Integration Issues of (Ba,Sr)TiO 3 Thin Films in High Density Devices
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ABSTRACT Recent progress to overcome integration issues related with (Ba,Sr)TiO 3 films are presented. Firstly, ternary barrier material, Ti0 .TA10 3N deposited by reactive sputtering is shown to have superior oxidation resistance than TiN through the test using contact string pattern where Pt is deposited as a electrode. Ti07.A1 0.3N barrier is able to keep stable contact resistance below 1000 even under oxidizing condition where the temperature is 550'C and oxygen partial pressure is 7.6 Torr. If rapid thermal annealing is used, annealing temperature without oxidation of Ti07A10.3N can be increased by about 100*C. Ti0 .7Al0 .3N is thought to be the promising one which can endure during post-annealing process. Secondly, electroplating technology is employed to fabricate the stack capacitor of Pt that has been known to be very difficult to etch. 500A-thick Pt is used as a seed layer and very thick Pt is selectively grown on the seed layer by the electroplating. The Pt height can be controlled by changing the electroplating time, so we can make stack Pt over 8000A. Thirdly, low temperature deposition process for MOCVD BST film is developed. The equivalent oxide thickness of about 3.5A is obtained on Pt electrode when BST thickness is 150A. BST film is deposited at 420'C and annealed at 700'C under oxidizing atmosphere. It is suggested that a new two step annealing consisting of high temperature annealing under inert atmosphere and low temperature annealing under oxidizing atmosphere is very effective to achieve the high dielectric constant and low leakage current of BST films at the same time. It is also adequate for preventing the barrier oxidation. BST film with Toxeq. of 5.2A and low leakage current is obtained by annealing at 650'C under N 2 followed by annealing at 550TC under 02. Electrical properties of BST deposited on side-wall of Pt concave capacitor is evaluated. The concave capacitor with about aspect ratio 3 shows the same capacitance and leakage current as the planar capacitor, which implies that BST composition and thickness is uniform on the side-wall. It is concluded that BST films on Pt electrode can be applied to real device. INTRODUCTION BST thin films have been given attention for the next dielectric material in GBit DRAMs due to its high dielectric constant. There are, however, several problems to be overcome in order to apply the BST films to the real device [1,2]. They were classified into three major parts; barrier material development, formation of three-dimensional structures, and low temperature MOCVD BST process. The barrier material was adopted to prevent the reaction between the noble metal used for electrode and poly-Si plug. TiN has traditionally been used as a barrier material in the contact process and has been shown to prevent the reaction, but it was easily oxidized during the post-annealing process. Therefore, ternary barrier materials were suggested to replace the TiN due to its low oxidation rate [3-7]. Until now, most studies regarding barrier materials were limited to measur
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