Integration of III-V Optoelectronic Components on Si Platform
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Integration of III-V Optoelectronic Components on Si Platform Alex Katsnelson, Vadim Tokranov, Michael Yakimov, and Serge Oktyabrsky UAlbany Institute for Materials, University at Albany – SUNY, Albany, NY 12203, U.S.A ABSTRACT A method for hybrid integration of III-V optoelectronic components on Si substrate using BCB was demonstrated. The method included bonding, selective wet etching of the GaAs substrate, components separation by wet etching, two-level metallization and lateral oxidation to form optical apertures. Simulations of thermal behavior and mechanical stresses of this integration scheme were performed using finite element analysis, which revealed adequate heat dissipation. Simulations show that this bonding protocol allows reduction of overheating and mechanical stress that enhances the optoelectronic device performance and increases reliability. Electro-luminescence spectrum, I-V and P-T characteristics were measured and compared with a reference homoepitaxial structure and the results of the simulations. Measured thermal impedance was found to be less then two times higher than that for the devices on a host GaAs wafer. Novel method of substrate removal named oxidation lift-off was proposed and demonstrated. This process allows to release a VCSEL structure with epitaxial DBRs and separate individual components on Si, reduces the number of process steps and eventually reduces cost of the fabricated devices. Au/Ge alloy was used for the metal bonding of the test oxidation lift-off structure. Substrate removal, device separation, bonding and formation of the oxide apertures were done within a single processing step. INTRODUCTION Chip-level optical interconnect is one of the promising solutions for a further advancement of electronic integrated circuits with sufficiently high bandwidths [1]. Due to high defect density in the III-V structures grown directly on Si, hybrid integration of efficient light sources such as vertical cavity surface emitting lasers (VCSELs) is the technology of the choice. It requires a development of a stress-free alignment-tolerant scheme that provides reliable bonding of large substrates, compatibility of the VCSEL process flow with Si ICs and bonding technologies and effective heat dissipation. One of the key points of any hybrid integration scheme is substrate removal. Substrate removal allows reduction of the stress produced by high thermal expansion coefficient mismatch in GaAs/Si system. There are three major methods of substrate removal. First of them is wet chemical etching of the substrate. In this method etch stop layer should be imbedded into the structure during the growth process. Edges of the bonded structure need to be protected by the wax or other material that is resistive to the etching solution. Bonding material and all layers on the wafer structure bonded to should be either resistive to chemistry used for etching or to be protected from chemical damages. Highly selective solutions (such as citric acid/hydrogen peroxide for GaAs [2]) are required to ac
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