Interface properties of Si 3 N 4 /Si/n-GaAs metal-insulator-semiconductor structures grown on GaAs(111)B substrate
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27 Mat. Res. Soc. Symp. Proc. Vol. 448 01997 Materials Research Society
and inversion regions with a minimum trap density of 8x 101 0 cm-2 eV- as determined by the conductance method. EXPERIMENT The GaAs( 1I l)B substrate with 5' miscut toward [100] direction was degreased and etched in NH 4 OH:H 2 0 2 :H2 0 = 3:1:150 for about 3 min. prior to loading into the system. The formation of GaAs MIS capacitors was initiated by the growth of a 0.5 [1m, 5x10 16 cm3 Si-doped GaAs buffer layer on a n+ GaAs( Ill )B substrate in Perkin Elmer molecular beam epitaxy (MBE) system. The surface reconstruction pattern and the surface morphology were recorded with reflection high electron energy diffraction (RHEED) and Nomarski microscope, respectively, as a function of growth temperature. The ratio of As to Ga fluxes during the growth of GaAs buffer layer was kept about 5 during the entire growth. The sample was transferred via an ultrahigh vacuum (UHV) transfer tube (< 2x10-9 Torr) to a UHV chamical vapor deposition (CVD) system. Then a Si interlayer about 10 A was employed, followed by a 200 A-thick Si3 N 4 layer deposited at 250 W and 350'C. Employing an in situ X-ray photoelectron spectroscopy (XPS), measurement of very thin (-3 10-20 A) Si interface layer thickness could be made with a reasonable accuracy. Experimental details concerning the CVD deposition, the MBE growth, and MIS capacitor 11 fabrication have been presented elsewhere.2, ,3 Following the thermal desorption of the surface oxides at 600 ± 10'C, the GaAs(lll)B surface yielded a faint ( "i19x •/19) surface reconstruction. GaAs homoepitaxial layers of 0.5 gm thickness on GaAs(111 )B showed mirrorlike features in the surface morphology when grown at the substrate temperatures of 575 and 625 'C, respectively. However, the sample grown at 530 °C depicted rough surface morphology, displaying three fold pyramids and some other types of defects. During the growth, the surface reconstruction of the film grown at 625°C changed to (lx l)HT,6 while that of the film grown at 575°C maintained ('19x •I19). Nomarski observation demonstrated better surface morphology on the as-grown layer when grown at 625°C rather than at 575 'C. Since the higher substrate temperature may reduce the relative amount of As and/or increase the cation (Ga atoms) migration length on GaAs surface, the smoother surface morphology was thought to be obtained at elevated growth temperatures, which is also reported 5 elsewhere. ,6 RSULTS AND DISCUSSION Fig. 1 depicts the typical C-V characteristics of the Si3 N4 /Si / n-GaAs capacitors grown on GaAs(1 1 l)B. The high frequency C-V (HFCV) and quasi-static C-V (QSCV) curves of MIS diodes with a GaAs growth temperature of 575 'C are shown in Fig. 1 (a). These curves exhibit ideal C-V characteristics. Experimental C-V curves as a function of gate voltage and GaAs growth temperatures are presented in Fig. l(b). For the sake of comparison, the theoretical C-V profile is also shown in this figure. Typical hysteresis values of about 60 mV, as shown in Fig. 1(a), we
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