Modeling and Fabrication of Quantum Dot Channel Field Effect Transistors Incorporating Quantum Dot Gate
- PDF / 245,534 Bytes
- 6 Pages / 432 x 648 pts Page_size
- 68 Downloads / 203 Views
Modeling and Fabrication of Quantum Dot Channel Field Effect Transistors Incorporating Quantum Dot Gate Jun Kondo1, Murali Lingalugari1, Pik-Yiu Chan1, Evan Heller2 and Faquir Jain1 1
ECE Department, University of Connecticut, ITE Building, 371 Fairfield Way, Unit 2157, Storrs, CT 06269, U.S.A.
2
Synopsys Inc., 400 Executive Boulevard, Ossining, NY 10562, U.S.A.
ABSTRACT Quantum dot gate (QDG) field-effect transistors (FET) have shown three-state transfer characteristics. Quantum dot channel (QDC) field-effect transistors (FET) have exhibited fourstate ID-VG characteristics. This project aims at studying the effect of incorporating cladded quantum dot layers in the gate region of QDC-FET. Four-state characteristics are explained by carrier transport in narrow energy mini-bands which are manifested in a quantum dot superlattice (QDSL) channel. QDSL is formed by an array of cladded quantum dots (such as SiOx-Si and GeOx-Ge). Multi-state FETs are needed in multi-valued logic (MVL) that can reduce the number of gates and transistors in digital circuits. The fabricated device showed the four-state characteristic (OFF, ‘I1’, ‘I2’, ON). INTRODUCTION The construction of Quantum Dot Channel (QDC) with Quantum Dot Gate (QDG) FieldEffect Transistor (QDC-QDG-FET) using silicon quantum dot layers was reported in 2011 [1]. The structure of the QDC-QDG-FET using silicon quantum dots is shown in Figure 1. The channel consists of two layers of silicon quantum dots (SiOx-cladded Si) which were sitespecifically self-assembled [2]. In order to isolate the inversion channel from the gate, the dry oxidation was conducted on the top layer of the bottom set of silicon quantum dot layer. The gate consists of two layers of silicon quantum dots which were also site-specifically self-assembled.
Figure 1. QDC-QDG-FET using Silicon Quantum Dots
149
ID-VG Characteristics The published ID-VG characteristics are shown in Figure 2. One significant ID current peak is observed at the VG voltage equal to approximately 1.7 volts when VD is equal to 1 volt. Two significant ID current peaks are observed at the VG voltages equal to approximately 1.6 and 2.1 volts when VD is equal to 1.5 volts.
VD=1.5 V VD=1.0 V VD=0.5 V
Figure 2. ID-VG Characteristics of the QDC-QDG-FET using Silicon Quantum Dots Source: F. Jain, S. Karmakar, P. Chan, E. Suarez, M. Gogna, J. Chandy and E Heller, “Quantum Dot Channel (QDC) Field-Effect Transistors (FETs) Using II-VI Barrier Layers.” Journal of Electronic Materials (June 2012). ID-VD Characteristics The published ID-VD Characteristics of QDC-QDG-FET using silicon quantum dot is shown in Figure 3. There are three ID current groups in Figure 3. The first group consisted of VG equal to 1.2, 1.3, 1.4 and 1.5 volts. The second group consists of VG equal to 1.6 volts. The third group consists of VG equal to 1.7, 1.8, 1.9 volts. The current line of VG equal to 1.6 volts is almost straight, and extends between the first group and the third group. VG=1.9V VG=1.8V VG=1.7V VG=1.6V VG=1.5V VG=1.4V VG=1.3V VG=1.2V
Figure 3. ID
Data Loading...
