Modeling of a GaN Based Static Induction Transistor
- PDF / 826,669 Bytes
- 6 Pages / 417.6 x 639 pts Page_size
- 54 Downloads / 213 Views
**
* Dept. of Physics, Boston University, Boston, MA, 02215, [email protected] Dept. of Electrical and Computer Engineering, Boston University, Boston, MA, 02215
Cite this article as: MRS Internet J. Nitride Semicond. Res. 4S1, G6.41 (1999) ABSTRACT Static induction transistors (SITs) are short channel FET structures which are suitable for high power, high frequency and high temperature applications. GaN has particularly favorable properties for SIT operation. However, such a device has not yet been fabricated. In this paper we report simulation studies on GaN static induction transistors over a range of device structures and operating conditions. The transistor was modeled with coupled drift-diffusion and heat-flow equations. We found that the performance of the device depends sensitively on the thermal boundary conditions, as self-heating effects limit the maximum voltage swing. INTRODUCTION GaN is a wide-bandgap semiconductor (Eg=3.4 eV), and therefore has a high breakdown field [1] and low thermal generation rate. These properties combined with good thermal conductivity and stability make GaN an attractive material for high power/ high temperature and radiation harsh environment electronic devices. Monte Carlo simulations predict a peak electron velocity of 3.2x10 7 cm/s and a saturation electron velocity of 2.5x10 7 cm/s [2]. This makes possible high frequency operation of GaN devices. SIT's are short channel FET structures in which the current, flowing vertically between source and drain, is controlled by the height of an electrostatically induced potential barrier
under the source [3]. A cross-sectional diagram of the SIT is shown in Figure 1. Source II~WS I
SI
dSG
i
G dGD
WG
I ehG
j n channel
L- - -
Unit Cell
Gate
Drain
Figure 1. Cross-section of static induction transistor (SIT) structure considered in this work and the unit cell simulated with critical dimensions labeled. Electrons are emitted from the source, which is at ground potential, and are accelerated to the drain, which is biased at positive potential, where they are collected [4]. A very thin heavily doped layer is deposited next to the drain and source contacts in order to form ohmic contacts. A grid structure is located in the space between the source and drain electrodes so the charged G 6.41
Mat. Res. Soc. Symp. Proc. Vol. 537 © 1999 Materials Research Society
carriers can be externally modulated. The RF gain of the device is determined by the efficiency with which the modulation is affected. The grid structure is generally fabricated using pn or Schottky junctions. A range of field effect transistors including MESFET, MISFET, inverted channel A1GaN/GaN and MODFET have been developed with potential applications for high power/ high temperature electronics [2,5-8]. To our knowledge, the highest cut-off frequency reported for GaN-based FET's is 52 GHz [9], and the maximum frequency of oscillations is over 97 GHz [10]. Significant results regarding the power output of GaN-based FET's have been reported by several groups [9, 11]. W
Data Loading...
