Modeling of the submicron CMOS differential ring oscillator for obtaining an equation for the output frequency

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Modeling of the submicron CMOS differential ring oscillator for obtaining an equation for the output frequency Aravinda Koithyar1

· T. K. Ramesh1

Received: 15 October 2019 / Revised: 5 September 2020 / Accepted: 9 September 2020 © Springer Science+Business Media, LLC, part of Springer Nature 2020

Abstract A symbolic expression that approximates the output frequency of the submicron differential ring oscillator, using the detailed transient behavior of the MOSFETs, is presented in this article. The circuit of the oscillator is simulated from 3-stage till 21-stage, with the range of output frequency from 0.3756 GHz till 2.6925 GHz. Later on, for verifying the similar functionality with different Beta ratios, a 7-stage differential ring oscillator is utilized. The average difference between the computed and the simulated values of the output frequency is found to be 1.98%, with TSMC 180 nm technology, when the value of Beta ratio was 2.3. The expression indicates that the output frequency is inversely proportional to the square of the device length. By including an empirical constant in the derived equation, the mathematical expression can be utilized for the hand calculations, for obtaining the output frequency of the differential ring oscillator. Keywords Differential ring oscillator · Delay cell · Stage delay · Switch model · SPICE parameters

1 Introduction An oscillator is an integral part of any electronic system, and voltage-controlled oscillator is an essential component in frequency synthesizers [12, 21]. In the frequency range of GHz, there are two design choices—LC oscillator and ring oscillator. The LC oscillators are tuned ones, whereas the output frequency of the ring oscillators depends on the parasitic RC components of the MOS devices, at each stage. The former ones have the advantage of better noise performance, whereas the area requirement is much larger, because of the usage of back end or thick metal layers for the

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T. K. Ramesh [email protected] Department of Electronics & Communication Engineering, Amrita School of Engineering, Amrita Vishwa Vidyapeetham, Bengaluru, India

Circuits, Systems, and Signal Processing

Fig. 1 Block diagram of a 3-stage DRO

Fig. 2 Circuit diagram of conventional delay cell for DRO

spiral inductors [7, 25]. In addition, the LC oscillators provide lesser tuning range. The ring oscillators have the advantages of lesser area and wider tuning range. In addition, they provide multiple output phases. There are two design types with ring oscillators—single-ended and differential. The former one has the advantages of lesser power consumption, lesser size, ease of design and larger signal swing. But the latter one is more popular because of the better noise performance and still larger tuning range. Due to high common mode rejection ratio, the differential ring oscillator (DRO) has better performance in terms of substrate as well as supply noise [24]. In addition, the DRO provides output in both true and complementary forms, thus avoiding the need of an additio