Nanocrystalline Silicon Films Deposited by RF PECVD for Bottom-gate Thin-film Transistors
- PDF / 331,935 Bytes
- 6 Pages / 612 x 792 pts (letter) Page_size
- 37 Downloads / 225 Views
0910-A22-13
Nanocrystalline Silicon Films Deposited by RF PECVD for Bottom-gate Thin-film Transistors Mohammad Reza Esmaeili Rad1, Czang-Ho Lee1, Andrei Sazonov1, and Arokia Nathan1,2 1 Electrical and Computer Engineering, University of Waterloo, 200 University Ave., Waterloo, ON, N2L 3G1, Canada 2 Department of Engineering, University of Cambridge, Cambridge, United Kingdom
ABSTRACT Undoped nanocrystalline silicon (nc-Si) films were deposited by 13.56 MHz PECVD at 250 C by varying RF power, reactor pressure, silane and hydrogen flow rates. To find the process window for device-quality nc-Si, we chose the Taguchi method to optimize the deposition process. The results show that silane and hydrogen flow rates are the dominant factors to film crystallinity. The results also indicate that for highly hydrogen diluted plasma, the reactor pressure does not have a significant effect on the film crystallinity. We have obtained nc-Si films with crystallinity ranging from 50% to 80% at film thicknesses ranging from 20nm to 100nm by optimizing the deposition conditions. A dark conductivity of 10-6 S/cm and conductivity activation energy of 0.46eV were measured. Tri-layer bottom-gate inverted-staggered TFTs were fabricated with different active layers comprising fully nc-Si and nc-Si / amorphous silicon (a-Si) bi-layer. The best TFT exhibits a field-effect mobility ~1 cm2/Vs, threshold voltage ~4V, and on/off current ratio ~105. ยบ
INTRODUCTION Thin-film transistor (TFT) is the most critical component in active-matrix arrays for liquid crystal displays, X-ray imagers and the newly-emerging organic light emitting diode (OLED) displays [1]. For example, TFTs in OLED displays are required to supply a stable driving current at every pixel. Polysilicon and a-Si TFTs are being considered for the active-matrix arrays. Polysilicon TFTs can render high mobility and stable drive current. However, it is costly with a further drawback of non-uniformity of device parameters over large-area substrates. On the other hand, a-Si is a low-cost technology for large-area fabrication. But, it suffers from low device mobility and electrical instability under prolonged applied gate voltages. The solution may lie in nc-Si, which is enjoying in creating attention for use as an active layer in TFTs, since it offers higher mobility and stability compared to its a-Si counterpart [2]. While top-gate TFTs with nc-Si active layer have shown promise to render high mobility drive current, compatibility requirements with current display production facilities, dictates bottomgate TFT structures. The basic requirements for obtaining high-performance bottom-gate nc-Si TFTs include: 1) high crystallinity nc-Si active layer, 2) minimum incubation layer at the interface with gate dielectric, 3) low defect density and weak bond density at the gate dielectric interface, and 4) low impurity concentration in the active layer.
Currently, bottom-gate nc-Si and a-Si TFTs both exhibit similar field effect mobility and threshold voltage shift due to charge trapping at the
Data Loading...
