Noise-Shaping All-Digital Phase-Locked Loops Modeling, Simulation, A
This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs)
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Francesco Brandonisio Michael Peter Kennedy
Noise-Shaping All-Digital Phase-Locked Loops Modeling, Simulation, Analysis and Design
Analog Circuits and Signal Processing
Series editors Mohammed Ismail, Dublin, USA Mohamad Sawan, Montreal, Canada
For further volumes: http://www.springer.com/series/7381
Francesco Brandonisio Michael Peter Kennedy
Noise-Shaping All-Digital Phase-Locked Loops Modeling, Simulation, Analysis and Design
123
Francesco Brandonisio Tyndall National Institute Cork Ireland
ISSN 1872-082X ISBN 978-3-319-03658-8 DOI 10.1007/978-3-319-03659-5
Michael Peter Kennedy University College Cork Cork Ireland
ISSN 2197-1854 (electronic) ISBN 978-3-319-03659-5 (eBook)
Springer Cham Heidelberg New York Dordrecht London Library of Congress Control Number: 2013955900 Springer International Publishing Switzerland 2014 This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. Exempted from this legal reservation are brief excerpts in connection with reviews or scholarly analysis or material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work. Duplication of this publication or parts thereof is permitted only under the provisions of the Copyright Law of the Publisher’s location, in its current version, and permission for use must always be obtained from Springer. Permissions for use may be obtained through RightsLink at the Copyright Clearance Center. Violations are liable to prosecution under the respective Copyright Law. The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use. While the advice and information in this book are believed to be true and accurate at the date of publication, neither the authors nor the editors nor the publisher can accept any legal responsibility for any errors or omissions that may be made. The publisher makes no warranty, express or implied, with respect to the material contained herein. Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com)
To Rocco, Nuccia and Rossana
Preface
All-Digital Phase Locked Loops (ADPLLs) have become very common in low cost and feature mobile phones. In recent years, extensive research activity on ADPLLs has focused on increasing the performance of ADPLLs, thus increasing the range of their possible applications. The theoretical noise performance of an ADPLL is limited by the quantization
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