Novel Approach for Fabrication of Single-Crystalline Insulator/Si/Insulator Nanostructures
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0928-GG03-04
Novel Approach for Fabrication of Single-Crystalline Insulator/Si/Insulator Nanostructures Andreas Fissel1, Dirk Kuehne1, Eberhard Bugiel2, and H. Joerg Osten1,2 1 Information Technology Laboratory, University of Hannover, Schneiderberg 32, Hannover, D30167, Germany 2 Institute of Electronic Materials and Devices, University of Hannover, Appelstr. 11A, Hannover, D-30167, Germany
ABSTRACT Double-barrier insulator/Si/insulator nanostructures on Si(111) have been grown using molecular beam epitaxy. Ultrathin single-crystalline Si buried in a single-crystalline insulator matrix with sharp interfaces was obtained by a novel approach based on an epitaxial encapsulated solid-phase epitaxy. As an example, we demonstrate the growth of Si buried in Gd2O3 and the incorporation of epitaxial Si islands into single-crystalline Gd2O3. The I-V characteristic of the obtained nanostructures exhibited negative differential resistance at low temperatures, however, with a strong memory effect. INTRODUCTION Double-barrier structures using epitaxial insulator barriers and Si as quantum-well and substrate material are particularly interesting because of its applicability to tunneling devices. In this context, CaF2[1,2] and some rare-earth metal oxides (REOs), such as Y2O3[3], CeO2[4], (LaXY1-X)2O3[5] and Pr2O3[6,7], are suitable insulators with sufficiently large band offsets (> 1 eV) with respect to Si and a crystal structure compatible to Si with a good lattice matching. For these materials also epitaxial growth on Si(111) was reported. However, the fabrication of an epitaxial insulator/Si/insulator stack requires not only the growth of ultra-thin, atomically flat and defect-free insulator on Si, but also the growth of epitaxial Si layers on the insulator. The latter can not be achieved straightforward because of the differences in surface free energy between the insulator and silicon. The surface free energy of insulators is often much lower than that of Si, and thus, Si deposition on insulators at elevated temperatures results in island formation especially in the initial growth stage. This problem can partly be overcome using dedicated approaches to increase the surface energy and/or to reduce the Si adatom surface mobility. Electron beam exposure [8] or surfactant-mediated solid-phase epitaxy (SPE) was used to prevent Si islanding [9-11]. But, the especially the latter procedure limit the applicability of the nanostructure because of the incorporation of the surfactant atoms, which often act also as dopants in Si. Here, we report about a novel approach to fabricate single-crystalline nanostructures with a Si layer buried in an oxide matrix on Si(111) without any additional surface modifications or surfactants. In our approach, the Si layer is formed by an epitaxial encapsulated SPE. We call this method cooperative solid-vapor-phase epitaxy because the SPE of Si is accompanied simultaneously by an epitaxial vapor-phase growth of the insulator on top of the initially
amorphous Si layer. This new approach can lead to ul
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