Observation of compound semiconductors and heterovalent interfaces using aberration-corrected scanning transmission elec
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Jing Lu Center for Photonic Innovation, Arizona State University, Tempe, AZ 85287, USA; and School of Engineering for Matter, Transport and Energy, Arizona State University, Tempe, AZ 85287, USA
Toshihiro Aoki LeRoy Eyring Center for Solid State Science, Arizona State University, Tempe, AZ 85287, USA
Martha R. McCartney Department of Physics, Arizona State University, Tempe, AZ 85287, USA; and Center for Photonic Innovation, Arizona State University, Tempe, AZ 85287, USA
Yong-Hang Zhang Center for Photonic Innovation, Arizona State University, Tempe, AZ 85287, USA; and School of Electrical, Computer, and Energy Engineering, Arizona State University, Tempe, AZ 85287, USA (Received 8 June 2016; accepted 25 July 2016)
This paper reviews our recent investigations of compound semiconductors and heterovalent interfaces using the technique of aberration-corrected scanning transmission electron microscopy. Bright-field imaging of compound semiconductors with a collection angle that is comparable in size to the incident-beam convergence angle is demonstrated to provide better atomic-column visibility for lighter elements in comparison with the more traditional high-angle annular-dark-field approach. Several pairs of Group II–VI/Group III–V compound semiconductors with zincblende structure have been studied in detail. These combinations are all valence-mismatched (i.e., heterovalent), and include CdTe/InSb (Da/a # 0.05%), ZnTe/InP (Da/a 5 3.8%), and ZnTe/GaAs (Da/a 5 7.4%). CdTe/InSb (001) interfaces are observed to be defect-free with a slight lattice contraction at the interface plane. For interfaces with larger lattice-parameter mismatch, the primary interfacial defects are identified as Lomer edge dislocations and perfect 60° dislocations. However, the atomic structure of the dislocation cores has not yet been unambiguously determined.
I. INTRODUCTION
Optoelectronic semiconductors have evolved rapidly over the past half-century, with widespread applications emerging in many areas including emitters, detectors, communications, power generation, and solar cells used for displays. Existing devices are most often based on materials from the same isovalent and isostructural chemical family, such as Groups II–VI/II–VI (CdTe/ HgTe), Groups III–V/III–V (InN/GaN, GaAs/AlAs, GaAs/InAs), or Groups IV/IV (Si/Ge). However, the wide diversity of substrates in common usage for these diverse applications makes it challenging to achieve Contributing Editor: Eric Stach a) Address all correspondence to this author. e-mail: [email protected] This paper has been selected as an Invited Feature Paper. DOI: 10.1557/jmr.2016.297
monolithic device integration. Moreover, mismatch of lattice parameters invariably means that structural defects that occur during epitaxial growth can become a serious obstacle when attempting to optimize materials quality, while electron traps associated with these defects are likely to have a negative impact on electronic properties. One possible solution that could alleviate lattice-mismatch issues is to combin
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