Oxide-nitride-oxide Dielectric Stacks with Embedded Si-nanoparticles Fabricated by Low-energy Ion-beam-synthesis
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0997-I03-10
Oxide-nitride-oxide Dielectric Stacks with Embedded Si-nanoparticles Fabricated by Lowenergy Ion-beam-synthesis Vassilios Ioannou-Sougleridis1, Panagiotis Dimitrakis1, Vassilios Em. Vamvakas1, Pascal Normand1, Caroline Bonafos2, Sylvie Schamm2, and Gerard Ben Assayag2 1 Institute of Microelectronics, NCSR 'Demokritos', Patriarchou Gregoriou Street, P.O. Box 60228, Aghia Paraskevi, Attika, 153-10, Greece 2 CEMES, CNRS, 29 rue J. Marvig, Toulouse, 31055 Toulouse, France
ABSTRACT This work reports on the formation of Si-nanocrystals within silicon nitride layers by low-energy Si ion implantation. Electrical characterization of oxide/Si-nanocrystal-nitride/oxide dielectric stacks demonstrates regions of negative differential resistance at low electric fields. In addition, the memory characteristics in terms of charge trapping, write/erase response and retention properties of the dielectric stacks were recorded. The results indicate the large potential of the low-energy ion beam synthesis method in nitride memory technology. INTRODUCTION Discrete charge storage memory devices have fundamental advantages over the conventional polycrystalline silicon floating-gate nonvolatile memories. These are mainly realized by silicon nitride based memories (i.e. poly-Silicon-Oxide-Nitride-Oxide-Silicon SONOS) and Nanocrystal memories (NCMs). In the first type of devices, charges are trapped into intrinsic bulk defects of a silicon nitride layer placed in between two silicon oxide layers. In NCMs, charges are trapped into metallic or semiconductor crystalline dots having size of a few nanometers. These NCs are usually embedded into the gate insulating material (i.e. SiO2). Trapping in NCs, should offer better charge retention due to the existing deeper energy states. If the NCs are embedded into a nitride layer then it is obvious that any detrapped electron from the NCs could be easily caught by the intrinsic nitride defects and thus the memory window should be maintained. In this work, we report on the structural and electrical properties of Si-NCs formed by low-energy ion implantation of Si ions into Si3N4 and subsequent thermal annealing. EXPERIMENTAL DETAILS ONO type structures having Si-NCs embedded within the nitride layer were fabricated by low-energy ion-beam-synthesis. Thin SiO2 layer, about 3nm, was thermally grown at 850oC in dry oxygen atmosphere onto n-type (1-10 Ω⋅cm) Si (100) substrate. Subsequently, a 6.5nm thick Si3N4 film was deposited by low-pressure chemical vapor deposition (LPCVD) using a mixture of dichlorosilane (SiH2Cl2) and ammonia gasses (NH3) at 850oC. Next, the sample were implanted with 1 keV Si ions to a dose 1.5×1016 cm-2. Following the implantation step, a 6 nm high temperature SiO2 layer was deposited by LPCVD on top of the stack serving as control oxide and finally, the structure was annealed at 950oC for 30 min in N2 ambient. Generic MONOS type Al gate capacitors were finally fabricated by photolithography and metal wet etching. Control MONOS capacitors, i.e. without the Si implantation
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