Packaging Of Ultrathin Semiconductor Devices Through The ELO Packaging Process
- PDF / 43,281 Bytes
- 6 Pages / 612 x 792 pts (letter) Page_size
- 96 Downloads / 267 Views
Packaging Of Ultrathin Semiconductor Devices Through The ELO Packaging Process Mike Sickmiller ELO Technologies, Inc. Torrance, CA 90501
ABSTRACT The trend in semiconductor packaging is moving toward thinner and thinner packages. Likewise, chip profile is moving toward thinner and thinner chips. Presented here is a technique used to obtain a semiconductor package containing chips as slim as one micron in thickness. The ELO Packaging Process yields ultrathin chips for applications such as advanced heat sinking, high-efficiency optoelectronics, multiple stacked chips in a single package, and thin mechanically flexible semiconductor circuits. This technology is being developed around both the fab and packaging house so as not to interfere with the conventional semiconductor fabrication process flow. Through a combination of back-grinding and chemical etch techniques, chips have been thinned to as little as 1 µm and bonded to a variety of new host substrates[1]. Several bonding methods have been utilized – including thin solder or epoxy layers – to bond these functional chips to a variety of new substrates. Ultrathin microwave power amplifiers have been bonded to heat sinks and optoelectronic devices have been bonded to transparent substrates. In both cases, the ultrathin chip configuration coupled with the desired substrate can increase performance of the chip by a factor of 10X.
INTRODUCTION ELO Technologies, Inc. has devised a manufacturing process for packaging extremely high density, high power microelectronics through the use of epitaxial liftoff. Our ELO Packaging Process will improve electrical and thermal performance, increase circuit and package density, and increase system integration while reducing the size, weight, and cost of the package and system. By removing the thermally and electrically insulating semiconductor substrate and coupling the electronics more intimately with a heat sink or CMOS processing circuitry, we can reduce the operating temperature and increase power density and interconnection speeds while minimizing electrical parasitics to the device and package[2]. The fundamental manufacturing technology has been proven and the effort is now focused on development of manufacturable prototypes including microwave power amplifier chips and VCSELs-CMOS integrated optoelectronic integrated circuits (OEICs). We expect performance enhancements which could reach an order of magnitude increase in power density, reliability, efficiency, speed, or any combination of these parameters.
I7.3.1
MOTIVATIONS This technology will enable the next generation of high-speed, high-power, high thermal efficiency wireless and Opto-electronic integrated circuit semiconductor components. The ELO Packaging Process allows for the thinning of semiconductor chips to only a few microns in thickness and their bonding and electrical and thermal interconnection to virtually any substrate. Thermal power dissipation has been identified as the largest hurdle in GaAs microwave devices and in many cases is the limiting factor i
Data Loading...
