Patterning Anodic Porous Alumina with Resist Developers for Patterned Nanowire Formation
- PDF / 405,336 Bytes
- 6 Pages / 432 x 648 pts Page_size
- 23 Downloads / 162 Views
Patterning Anodic Porous Alumina with Resist Developers for Patterned Nanowire Formation
SeungYeon. Lee, Daniel Wratkowski, and Jeong-Hyun Cho Department of Electrical and Computer Engineering, University of Minnesota, Twin Cities, MN 55455, U.S.A.
ABSTRACT Formation of patterned metal and semiconductor (e.g. silicon) nanowires is achieved using anodic aluminum oxide (AAO) templates with porous structures of different heights resulting from an initial step difference made by etching the aluminum (Al) thin film with a photoresist developer prior to the anodization process. This approach allows for the growth of vertically aligned nanowire arrays on a metal substrate, instead of an oriented semiconductor substrate, using an electroplating or a chemical vapor deposition (CVD) process. The vertically aligned metal and semiconductor nanowires defined on a metal substrate could be applied to the realization of vertical 3D transistors, field emission devices, or nano-micro sensors for biological applications. INTRODUCTION There have been great advances in integrated circuit technology resulting in electronic devices with higher density and lower power consumption over the past four decades [1]. As devices shrink in size to sub-100nm scale, semiconductor nanowires receive great interest as the active component in future nanoscale circuits and devices in that the critical size, position, and density of the nanowires is well controlled during synthesis [1-3]. However, current technology faces challenges with the integration of vertical semiconductor nanowires in circuits and devices, especially on the single nanowire level. Substrates where vertical Si semiconductor nanowires are grown are limited to semiconductor substrates with {111} orientation using a CVD process [3-5]. Otherwise, the growth direction of nanowires occurs randomly depending on the orientation of the substrate surface. However, for circuit integration, the nanowires should be formed on a metal surface. Currently, fabrication of thick anodic aluminum oxide (AAO) templates with patterning is of great interest since patterned porous alumina can be used as a template for vertically aligned patterned semiconductor and metal nanowire synthesis on a metal substrate [6-8]. The synthesized nanowires, in turn, can be integrated into the development of biological and chemical sensors, semiconductor nanowire solar cell devices, and vertical 3D transistors [9-11].The conventional way of patterning an AAO template, which involves wet or dry etching processes to make desired nanowire patterns, requires multiple lithographic processes [7-8, 12]. The problems with the conventional method are it leads to lifting and poor side wall quality of AAO template and involves multiple lithography process [12]. Moreover, because the template usually requires a thick layer to form high aspect ratio porous structures, it is extremely hard to realize submicrometer scale nanowire patterns or a single nanowire with a
13
Porous structures
PR Al
a.
Pt / Ti Si
c.
b.
d.
Figure 1. C
Data Loading...
