Photo-Leakage-Current Analysis of Poly-Si TFT by Using Rear Irradiation OBIC Method

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EXPERIMENTAL A schematic diagram of the OBIC measurement system is shown in Fig.1. A He-Ne Laser (633nm) was used for the light source. The laser beam was introduced from the back of the TFr sample through an object lens and was focused on the device. The beam spot diameter was 1.3[tm in full width half maximum and the beam intensity was 3nW. The drain current of the photo-leakage-current was measured by a current amplifier (Keithley 427). The output of the current amplifier was collected and stored in a CPU. The sample was scanned by using an X-Y stage in Iltm pitch to obtain the distribution of the photo-leakagecurrent. The gate and drain voltages are settled at -5V and IV, where the dark drain current was about 10-0-10-1- 1 A. The measurement region was either 30X30tm 2 or 30X35[tm 2 area. It took about 5min. for each measurement. The transmission laser beam intensity was simultaneously measured by a photo-multiplier set above the TFF sample. In order to identify the photo-leakage-current generation region, the photo-leakage-current distribution was superposed onto a distribution of the transmission light intensity, which corresponded to the device pattern of the TFT sample. The co-planer type poly-TFl samples were fabricated on coming 1737 glass. The microscope photograph and schematic diagram of a cross-section view of the poly-Si TFT are shown in Figs.2 and 3. The poly-Si film was prepared by laser annealing a-Si which was deposited by the low pressure CVD (Chemical Vapor Deposition) of Si2H6 at substrate temperature of 450'C. The gate insulator was SiO2, deposited by the plasma-enhanced CVD of TEOS (Tetra-Ethyl-Ortho-Silicate). The gate electrode is also a P-doped poly-Si layer. The offset gate TFls were fabricated by patterning the gate insulator larger than the gate insulator.

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source and drain electrodes were fabricated by

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ion doping of P to the poly-Si film. Therefore

the samples in the present study were n-type. The offset region in the poly-Si film was covered with the gate insulator so that the region was protected from the ion doping. In the case of the LDD TFls, the offset region was doped by the ion implantation of low-

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concentration. The channel width and length of Controller j....- ... pthe offset TFl were 8.5ttm and 9[tm, diagram of rear irradiation Schematic respectively. These values for LDD TFl were Fig. 1 OBIC measurement apparatus. TFTm the of lengths 5[tm and 5[tm. The offset samples were 0-2Rm.

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Fig.3 Schematic diagram of a cross-sectional view of poly-Si TFT.

Fig. 2 Microscope photograph of the TFT sample.

RESULTS AND DISCUSSION The transfer characteristics of the offset TFT samples are shown in Fig.4. As the offset length increases, drain current (Id) decreases in the region above a gate voltage (Vg) of 5V. The on-current (Ion) values measured at Vg of 10V are summarized in the figure. The Ion values of the offset gate TFl with an offset length (