Processing of Ferroelectric Memories
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PROCESSING OF FERROELECTRIC MEMORIES CARLOS A.
PAZ DE ARAUJO,
L.
D. McMILLAN,
AND J.
F.
SCOTT
Symetrix Corporation, Colorado Springs, CO 80918 and The University of Colorado, Depts. of Physics and of Electrical Engineering and Computer Engineering, Boulder, CO 80309-0390 and Colorado Springs, CO 80933-7150 ABSTRACT This paper describes the classification of existing integration schemes for ferroelectric memories, including both nonvolatile and volatile devices, and the status of device development for CMOS (both SRAM and DRAM architecture), GaAs JFET structures, bipolar, and true ferroelectric FETs (in which the ferroelectric is deposited in the gate region to modify the source-to-drain current when the polarization is reversed). Emphasis in the paper is on electroding, film deposition, drying and baking, and annealing steps. INTRODUCTION Within the past four years there has been a renaissance in ferroelectric memory devices. Such memory systems were investigated in considerable detail in many large US electronics corporations from 1955-1975, with notable progress made at IBM, Bell Telephone Laboratories, Westinghouse, and RCA. Generally speaking they were not competitive with silicon integrated circuit devices (DRAMs or SRAMs) because of high operating voltages (thick films), endurance/fatigue problems, and crosstalk (disturb pulse problems); and after 1975 they became a lowpriority research project in most industrial R&D laboratories. A review of this early technology has been given recently by the present authors.[l] Since 1986, however, there has been a resurrection of interest in these ferroelectric systems, driven by improvements in thin-film technology (both sol-gel and sputtering). It is now possible to produce rather dense memories (cell size as small as 2 microns on a side) of ferroelectric thin films (250 nm thick) from a variety of materials, to integrate them fully into standard Si or GaAs ICs, and to achieve very fast READ/ERASE/REWRITE speeds (2 - 10 ns), 3V or 5V operation without internal charge pumps, high endurance (1012 destructive READ/WRITE cycles), and extreme radiation hardness (100 MRAD Si equivalent). These attractive properties make these devices suitable for replacement of several existing nonvolatile memory systems in present use, including plated wire, magnetic bubble memory systems, core, and most EEPROMs. As a result, at least four US corporations are engaged in prototype production of low-density (1k - 16k) random access memories (McDonnellDouglas, Raytheon, National Semiconductor/Krysalis, Ramtron), in addition to our company (Symetrix). Additionally, the high dielectric constant of ferroelectric films, which can exceed 4000 over a fairly wide temperature range, offers an improvement of two orders of magnitude over Ta 2 0 5 for high-capacity DRAMs, which should minimize the need for trenching or exotic geometries in the 64 Mbit DRAM of the near future. This aspect of ferroelectric thin films is being exploited in Japan by companies such as Mat. Res. Soc. Symp. Proc. Vol. 230
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