Prospects for dielectric constant reduction in integrated circuits interconnects
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Prospects for dielectric constant reduction in integrated circuits interconnects Maxime Darnon1,2,3, Nicolas Posseme4, Thierry Chevolleau1,2,3, Thibaut L. David4 1 Univ. Grenoble Alpes, LTM, F-38042 Grenoble-FRANCE 2 CNRS, LTM, F-38042 Grenoble-FRANCE 3 CEA-Leti-Minatec, LTM, F-38054 Grenoble-FRANCE 4 CEA-Leti-Minatec, F-38054 Grenoble-FRANCE ABSTRACT To improve the integrated circuits’ performance and continue the downscaling of dimensions, it is necessary to use low dielectric constant materials as interconnects insulators. Current porous SiCOH low-k dielectrics are now reaching their limits since their porosity enables the diffusion of species that modify the inner surface of the pores. To further reduce the dielectric constant, it is necessary to change paradigm in interconnects fabrication. In this paper, we discuss the most promising innovations in terms of process, materials and architectures to reduce the interconnects insulators dielectric constant. INTRODUCTION The continuous downscaling of device dimensions in integrated circuits leads to a constant reduction of the transistors switching speed. However, it also degrades the quality of the signal propagation in interconnects. When the conductor section decreases, the metal resistivity rises, and the associated resistance increases.[1] By packing the interconnects in a smaller volume, the associated capacity between metallic lines also increases. This results in an increased dynamic power consumption, cross talk noise between adjacent lines, and propagation delay between the transistors.[2, 3] To mitigate these phenomena, copper has replaced aluminum in the late 90’s as a metallic conductor, and low-k dielectrics (i.e. dielectric materials with a relative dielectric constant k lower than 4) are replacing the silicon dioxide. This was associated with the introduction of the damascene integration scheme that consists in etching trenches in the insulator and filling them with metal instead of etching metal lines. To conserve or improve the circuits’ performance while reducing the devices dimensions, the dielectric constant of the insulator should decrease at each technological generation.[4] The dielectric constant has three origins: the electronic polarisability, ionic polarisability and the dipolar polarisability.[5] To reduce the dielectric constant, one needs to reduce these components either by reducing the bonds polarisability in the material and/or by reducing the density of dipoles by reducing the material density. Historically, SiO2 was first doped by fluorine and then by carbon and carbon-containing groups (so-called SiCOH). To further reduce the dielectric constant, current integrated circuits work with porous SiCOH. The integration of porous materials in integrated circuits is not straightforward, since porous materials are very sensitive to their environment and may be damaged during the processing steps.[6, 7, 8, 9, 10, 11, 12, 13] In addition, their mechanical stability is lower than the one of dense materials which increases the defectivity dur
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