A voltage-adjustable output-capacitorless LDO regulator with split-length current mirror compensation and overshoot/unde
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A voltage-adjustable output-capacitorless LDO regulator with split-length current mirror compensation and overshoot/undershoot reduction Kui Wen1 • Shubin Liu1 • Yongyuan Li1 Received: 7 January 2020 / Revised: 3 June 2020 / Accepted: 26 July 2020 Ó Springer Science+Business Media, LLC, part of Springer Nature 2020
Abstract An output-capacitorless low-dropout regulator (OCL-LDO) using split-length current mirror compensation and overshoot/ undershoot reduction circuit are presented in this paper. At a supply of 1.5 V and a quiescent current of 8.2 lA, the proposed scheme can support a maximum load current of 50 mA. The proposed OCL-LDO has a range of output voltage from 0.8 to 1.25 V with 1.5 V supply. The proposed regulator is designed and post-simulated by UMC 55-nm standard CMOS process. The simulation results show that the proposed scheme is stable in different temperatures and process corners with 10 pF output capacitor. The maximum value of overshoot and undershoot is 69.0 mV and 91.5 mV, respectively. Keywords Low-dropout (LDO) regulator Output-capacitorless (OCL) LDO regulator Quiescent current Split-length current mirror compensation (SLCMC)
1 Introduction Power management circuit is very important in modern electronic devices [1–4]. The low-dropout (LDO) regulators are used in many applications, namely portable devices, Internet-of-Things (IoT), biomedicine and artificial intelligence. Comparing with switching regulators like DCDC converter, LDO regulator has low noise because there is no noise from switches [5, 6]. System-on-Chip (SoC) requires LDO regulator to power up digital logic circuits, especially under conditions where the battery voltage is low [7]. The increasing demand is apparent in consumer electronics products including smart phones, laptops, photo cameras, and fax machines [8, 9]. Conventional LDO regulator with an off-chip capacitor about 0.47 to 10 lF is easy to provide good transient performance and stability. However, on-chip capacitor is not easy to improve the integration of the chip and it costs a lot of chip area & Yongyuan Li [email protected] 1
Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, 2 Taibai Road, Xi’an 710071, People’s Republic of China
[10, 11]. Researching output capacitor-less LDO has practical significance. On the other hand, integrated circuit design method with IP multiplexing saves time, as well as, cost [12]. In IP design method, it is important for LDO regulator with ability of output voltage adjustment is increasing [13]. The LDO have traditionally been compensated using the Miller compensation technique [14]. This method achieves dominant pole compensation by pole splitting due to Miller capacitance multiplication effect. However, the compensation capacitance leads a RHP zero. The nulling resistor [14] and the adaptive Miller compensation [15] can both solve stability problems due RHP zero. Nulling resistor costs extra layout area and resistors accuracy will affect the compensation eff
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