Atomistic Simulation and Subsequent Optimization of Boron USJ Using Pre-Amorphization and High Ramp Rates Annealing
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1070-E05-08
Atomistic Simulation and Subsequent Optimization of Boron USJ Using PreAmorphization and High Ramp Rates Annealing Julien Singer1,2, François Wacquant3, Davy Villanueva1, Frédéric Salvetti1, Cyrille Laviron2, Olga Cueto2, Pierrette Rivallin2, Martín Jaraíz4, and Alain Poncet5 1 NXP Semiconductors, 850 rue Jean Monnet, Crolles, 38926, France 2 CEA-Leti Minatec, 17 rue des Martyrs, Grenoble, 38054, France 3 STMicroelectronics, 850 rue Jean Monnet, Crolles, 38926, France 4 University of Valladolid, Valladolid, 47011, Spain 5 Lyon Nanotechnologies Institute (INL), Villeurbanne, 69621, France ABSTRACT This study presents the use of atomistic process simulations to optimize p+/n ultrashallow junctions fabrication process. We first bring to the fore that a high concentration of interstitials close to the boron profile decreases the sensibility of boron diffusion to thermal budget. Preamorphization of the substrate is thus necessary to decrease boron diffusion by thermal budget reduction; the latter is obtained by the use of a high ramp rate annealing system instead of the classical lamp-type rapid thermal annealing. At the same time we show that the use of high ramp rates does not enhance boron activation, the substrate being preamorphized or not. So high ramp rates anneal can improve sheet resistance/junction depth trade-off only with preamorphization implant. Experiments are performed that confirm the predictions of our simulations. Further discussions explain activation path of boron throughout the temperature cycle, as a function of amorphous depth, for both lamp-type and high ramp rate annealing tool. INTRODUCTION Due to transistor size reduction, it is more and more important to introduce high concentrations of active dopants in Source and Drain extensions, while controlling their diffusion. One possible way to reach the best sheet resistance/junction depth (Rs/Xj) trade-off is to use high temperature (T), short time annealing, such as rapid thermal annealing (RTA), or fast-ramp spike anneals. Millisecond anneals (flash, LASER) provide good activation levels with low diffusion, but have to be coupled with more classical anneals. Otherwise extended defects remain and junctions can be too abrupt, leading to unacceptable leakage levels [1]. This work presents the use of atomistic simulations in order to understand the effect of aggressive ramps and to determine how to tune them for Rs/Xj trade-off optimization of boron (B) ultra-shallow junctions (USJ). Atomistic simulations are carried out using the kinetic Monte Carlo (kMC) method. We use DADOS, the code developed by the University of Valladolid [2]. One of the main advantages of kMC is to give the right trends even without specific calibration, and to guide the user in understanding the observed phenomena. Indeed all of the implemented mechanisms are always taken into account simultaneously, and all atomistic data are available at any time during the simulation. RESULTS AND DISCUSSION To facilitate interpretation of simulations and favor physical compreh
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