Defect Analyses in VLSI Devices by TEM Observation and Process Simulation
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DEFECT ANALYSES IN VLSI DEVICES BY TEM OBSERVATION AND PROCESS SIMULATION
H. MIKOSHIBA, N. NISHIO, T. MATSUMOTO, H. KIKUCHI, T.KITANO AND H. KANEKO
NEC Corporation, Kanagawa, Japan
VLSI
Development
Division,
1120
Shimokuzawa,
Sagamihara,
ABSTRACT This paper presents several examples of defect analyses carried out in actual VLSI failure analyses and experiments, using TEM technique, process simulation and other advanced analytical tools. New TEM techniques are also described to observe a precise location which has failed. INTRODUCTION As device geometry is decreased into submicron region and integration is increased more than millions devices per chip, small defects which have sizes of nm range and density of ppm-ppb levels affect greatly reliability and yield of VLSIs. These defects include substrate-origin defects such as oxygen precipitates, point defects and surface defects, thermal-stress-induced defects, and processinduced defects such as ion-implantation-induced defects, heavy metal precipitates and surface defects. Figure 1 indicates the evolution of failure analysis technologies with increasing integration of VLSI devices. It is notable that when DRAM size exceeds IM bits and device dimensions are reduced below Inim, advanced microanalysis tools, such as TEM, SIMS, AES etc. have been used extensively in failure analysis application. These microanalysis tools have been until recently used primarily in research and development applications. We can expect that some of these tools will be utilized for next generation devices even in fabrication lines, in addition to SEM and FIB. FIB is essential in recent failure analyses to precisely cut open an area which has failed and to observe the location by SEM. Since SEM resolution is insufficient for crystal defect analysis, TEM observation of a precise location has been strongly demanded. For this purpose, We have developed a new TEM sample preparation technique [I]. 4k
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Fig.1. The evolution of failure analysis technologies and LSI integration. Mat. Res. Soc. Symp. Proc. Vol. 262. ©1992 Materials Research Society
630
Microanalysis tools are used to effectively characterize defects, but are ineffective in some applications, such as micro area stress measurement and micro probing of three dimensional impurity distribution. In these cases, process simulation is a powerful tool to analyze these problems. The combined use of microanalysis and process simulation can enhance analytical capability with complementary and multi-sided data. In addition, microanalysis and simulation technologies can provide the optimum device structures and process conditions to eliminate defects from devices. In this paper, we first present nove
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