Junction and Profile Analysis using Carrier Illumination
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Junction and Profile Analysis using Carrier Illumination T. Clarysse1, W. Vandervorst1,2, R. Lindsay1, P. Borden3, E. Budiarto3, J. Madsen3 and R. Nijmeijer3 1
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium Katholieke Universiteit Leuven, Electrical Engineering Department, Kardinaal Mercierlaan 92, B-3001 Leuven, Belgium 3 Boxer Cross Inc., 125 Constitution Drive, Menlo Park, CA 94025, U.S.A. 2
ABSTRACT Carrier Illumination™ (CI) is an optical technique for non-destructive in-line monitoring of post-anneal junction depth and pre-anneal PAI depth and dose with wafer mapping capabilities. This work intends to extend the use of the CI-measurements from a range-specific quantitative measurement towards a more universal quantitative analysis of junction depth, profile abruptness and implant dose. For that purpose this paper presents a systematic study of the CI response to a wide variety of post anneal implant processes, varying parameters including implant species, dose and energy, annealing condition, and surface preparation. Samples containing B, BF2 and As-implants with and without Ge PAI layers, with junction depths between 10-120 nm, were measured. In addition near-ideal box-like profiles (as obtained with CVD-growth) were fabricated and measured. For the abrupt CVD profiles, CI measures the junction position with sub-nm resolution independent of the CI-analysis conditions. For more graded profiles resulting from annealed implants, the correlation to the SIMS junction depth becomes a function of generation laser current (which is proportional to the applied power). As the concentration level, at which the correlation is made, can be adjusted over a concentration range of approximately 2x1018 to 2x1019/cm3 by changing the laser current, a route towards correlating the CI measurement with profile abruptness becomes feasible. INTRODUCTION To yield advanced, high-performance Complementary Metal-Oxide-Semiconductor (CMOS) technologies, it is crucial to be able to characterize quickly and reliably sub-70 nm dopant structures [1]. For in-line monitoring of the involved pre- and post-anneal process steps, Carrier IlluminationTM (CI) has established itself as a fast, non-contact, non-destructive tool with wafer mapping capability. For the latter the exact quantitative interpretation of the CI signal is less important as long as high repeatability and sensitivity for a particular profile can be demonstrated [2]. Previously, it has been reported [3] that for annealed structures, the CI-signal is not only dependent on the dopant junction depth but also on other parameters such as the profile steepness. Hence one can envisage that a more universal quantitative interpretation of the CIsignal expands its application towards profile analysis, eventually enabling in-line measurement where off-line tools such as spreading resistance profiling for very shallow profiles have been used [4]. In this work we therefore explore in more detail the CI signal behavior for active dopant profiles ranging from near ideal (abrupt) junctions (as ca
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