Modeling Considerations for Phase Change Electronic Memory Devices
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0918-H05-06-G06-06
Modeling Considerations for Phase Change Electronic Memory Devices Guy Wicker Simulation and Modeling, Ovonyx Technologies, Inc., 2956 Waterview Dr., Rochester Hills, MI, 48309
ABSTRACT This paper discusses the modeling of phase change, chalcogenide alloy, electrical memory devices. Optical disk modeling, which uses the same alloys has yielded a good understanding of how the material’s structural change is related to temperature, time, nucleation of crystallites, and crystal growth. From this base, models of electrical memory behavior have been developed. Modeling the complex electronic nature of the amorphous phase is discussed and suggestions for improving device performance using these models are made. INTRODUCTION Electrical phase change memory devices are being developed as a potential replacement for EEPROM or DRAM in a variety of applications. These two terminal programmable resistors can be made smaller than the access device in series with them in a memory array, giving them a potential for higher densities than other memory technologies. They are nonvolatile, with a very long cycle life. They have the potential to work as multistate memory, further increasing storage density [1]. Improvements in performance and reliability necessary to commercialize these devices have been difficult to achieve, in part due to the absence of detailed models needed to optimize device behavior. Most modeling efforts have focused on determining the power needed to reset the device. This has been the predominant concern in making the technology viable because the melting power is larger than an access transistor in a high-density memory array can provide. Phase change is accomplished by electrically heating the material to cause melting over the entire surface area of at least one of the two electrode contacts to the material. Rapid cooling from the molten state yields the amorphous phase, which has a high electrical resistivity. Heating the material to above the glass transition temperature, but below the melting point results in nucleation and growth of the crystalline phase which is an electrically conductive semimetal. Heating is accomplished by passing current through the resistive chalcogenide alloy and using resistive electrode materials. Germanium antimony tellurium (GST) alloys are commonly employed because their melting point is around 600 Celsius and their crystallization speed is in the tens to hundreds of nanoseconds, which is comparable with electronic memory access speeds.
Figure 1. A simple structure of a phase change memory element for modeling In the above figure a device configuration is shown. At the bottom a 500 angstrom diameter titanium nitride electrode, surrounded by insulator, is in contact with a 500 angstrom thick GST film. A top electrode of titanium nitride is the second electrode. Due to the small contact area of the lower electrode, substantial heating occurs near this interface when current is applied so the shaded region in the GST layer can melt. By rapidly cooling this
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