Pentacene Thin Film Transistors and Circuits: Influence of Processing and Device Design
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PENTACENE THIN FILM TRANSISTORS AND CIRCUITS: INFLUENCE OF PROCESSING AND DEVICE DESIGN D. KNIPP, R. A. STREET, B. KRUSOR, J. HO Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304 ABSTRACT The influence of different dielectrics on the structural and electronic properties of pentacene films and TFTs is discussed. The pentacene films were thermally evaporated on inorganic dielectrics compatible with flexible substrates. A strong correlation between morphology and structural properties of the pentacene films and the mobility of the TFTs was observed for all the dielectrics studied. In the case of plasma enhanced chemical vapor deposited (PECVD) silicon nitride and silicon oxide dielectrics the growth of pentacene is mainly determined by the roughness of the dielectric. The roughness inhibits the ordering of pentacene molecules on the surface. However, by optimizing the fabrication process of the dielectrics, we have achieved similar pentacene mobilities on PECVD dielectrics and thermal oxide (0.4 cm2/Vs), without employing self-assembled monolayers like octadecyltrichlorosilane (OTS). An OTS treatment of oxide based dielectrics leads to an increase of the mobility by a factor of 2-3 up to >1cm2/Vs for thermal oxide. Pentacene films on inorganic dielectrics exhibit mobilities from of 0.2-1.2 cm2/Vs and high on/off ratios between 107 and 108. INTRODUCTION Despite the enormous progress in the fabrication of polymer and organic thin film transistors, pentacene is still the material with the highest hole mobility. Several groups reported poly crystalline thin film transistors (TFTs) based on pentacene with hole mobilities at room temperature close to the intrinsic transport limit of single crystals [15]. Extensive research is being carried out to study the electronic transport of polycrystalline pentacene [6-10]. For example, the influence of grain boundaries and crystal size on the mobility and the influence of oxygen on the stability of polycrystalline material has been studied [6,9]. Nevertheless, the transport mechanism of thermally evaporated polycrystalline pentacene TFTs, which are usually realized in bottom gate configuration, is not completely understood. Furthermore, most of the OTFTs are still realized on thermal oxide coated crystalline silicon wafers. Thermal oxide is a favorable dielectric for the growth of pentacene, but for the intended applications silicon substrates are too small and expensive. Attractive large area compatible dielectrics are sputtered or plasma deposited silicon nitride or silicon oxide dielectrics. The structural and the electronic properties of the pentacene films on inorganic dielectrics like thermal oxide and CVD silicon oxide and silicon nitride will be discussed in this paper. The different dielectrics will be compared with respect to morphology and structural properties. A comparison of different dielectrics also helps identify the origin of the TFT parameters such as mobility and subthreshold behavior.
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