Suitability of 4H-SiC Homoepitaxy for the Production and Development of Power Devices
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Suitability of 4H-SiC Homoepitaxy for the Production and Development of Power Devices Christian Hecht, Bernd Thomas, Rene Stein, and Peter Friedrichs SiCED Electronics Development GmbH & Co. KG, Guenther-Scharowsky-Strasse 1, D-91058 Erlangen, Germany ABSTRACT In this paper, we present results of epitaxial layer deposition for production needs using our hot-wall CVD multi-wafer system VP2000HW from Epigress with a capability of processing 6×100mm wafers per run. Intra-wafer and wafer-to-wafer homogeneities of doping and thickness for full-loaded 6×100mm runs will be shown and compared to results of the former 7×3” setup. The characteristic of the run-to-run reproducibility for the 6×100mm setup will be discussed. To demonstrate the suitability of the reactor for device production results on Schottky Barrier Diodes (SBD) processed in the multi-wafer system will be given. Furthermore, we show results for n- and p-type SiC homoepitaxial growth on 3”, 4° off-oriented substrates using a single-wafer hot-wall reactor VP508GFR from Epigress for the development of PiN-diodes with blocking voltages above 6.5 kV. Characteristics of n- and p-type epilayers and doping memory effects are discussed. 6.5 kV PiN-diodes were fabricated and electrically characterized. Results on reverse blocking behaviour, forward characteristics and drift stability will be presented.
INTRODUCTION Within the last 10 years the market for SiC-based power devices has been developed very rapidly. Schottky Barrier Diodes (SBD) with blocking voltages up to 1200 V are on the market, SBD for higher reverse voltages, high-voltage PiN-Diodes, JFETs and MOSFETs are evaluated and qualified for potential applications. The cost/performance ratio was improved due to progress in the quality and size of the wafer material as well as by significant advances in the epitaxial growth of active layers. The requirement of a cost-effective, reproducible and reliable epitaxial process led to the introduction of multi-wafer systems in 1998. Starting with multiple 35 mm and 2” wafer capability, multi-wafer systems for processing large-area wafers with diameters up to 100 mm are used today [1,2]. Important key parameters like homogeneities of doping and thickness, runto-run reproducibility and wafer throughput must be considered when evaluating epitaxial reactors and processes for industrial applications. For the production of SBD and other power devices in the blocking voltage range up to 3 kV, multi-wafer systems can fulfill the criteria given above, whereas single-wafer hot-wall reactors are mostly used for the development of high-voltage PiN-diodes with their significantly thicker epitaxial layer. The reduction of the off-orientation from 8° to 4° for 3” and 100 mm substrates led to new challenges for the epitaxial process. The commercially available SiC devices with their relatively thin epitaxial layer are fabricated on the cheaper 4°-off substrates. For thicker epitaxial
layers, especially for the voltage range above 3 kV blocking voltage, the more expens
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