The Future of CMP
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The Future of CMP David Evans Abstract Chemical–mechanical polishing, or planarization (CMP), is one of several advanced microfabrication processes that provide complementary capabilities for constructing advanced electronic devices. At the current state of the art, CMP demonstrates significant advantages due to its high degree of process flexibility, particularly in the chemical formulation of polishing solutions and slurries. This article explores some possible future applications of CMP using new advanced materials other than silicon, silicon oxide, and silicon nitride. Such materials may include refractory and noble metals, high- insulators, and mixed metal oxide perovskites. Although no one can predict future applications with absolute certainty, it seems safe to conclude that CMP will remain a key microfabrication technology for the foreseeable future. Keywords: chemical–mechanical planarization, chemical–mechanical polishing, CMP, insulators, thin films.
Introduction For any discussion of the future development of chemical–mechanical polishing, or planarization (CMP), one should perhaps consider CMP to be one of the newest members of a suite of microfabrication processing techniques that include photolithography, dry etching, chemical vapor deposition (CVD), and physical vapor deposition (PVD). Of course, the primary motivation for the development of all of these technologies has been the rapid and phenomenal advancements in hard-disk storage capacity and silicon solid-state electronics over the last 30 to 40 years. Moreover, there are substantial current efforts both to adapt and to extend the application of these processes to the fabrication of microelectromechanical systems (MEMS), advanced displays, threedimensional systems, and so on. Therefore, in addition to purely electronic applications (e.g., dielectric planarization, tungsten plug fabrication, and copper damascene structures), various new applications of CMP can be expected in the future.
Historical Background Within this context, it is instructive to briefly compare the histories of CMP and dry etching. In both cases, initial applications were found in the fabrication of circuit interconnect wiring, that is, so-called back-end processes.1,2 For dry etching, this was the fabrication of vias or throughholes between the wiring levels. Conventional wet chemical etching could not be used because of poor etch-rate controlla-
MRS BULLETIN/OCTOBER 2002
bility and, more important, the fact that lateral etching seriously degraded final feature size specifications. Similarly, an initial motivation for CMP was the planarization of interlevel dielectric layers to allow the use of higher-resolution optics for photolithography that naturally have more stringent requirements for depth of focus, radiation wavelength, suppression of standing waves, layer-to-layer registration, and other parameters. As a consequence, specifications for final feature sizes were again improved. Thus, in a general sense, dry etching provides precise horizontal dimensional control
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