The Readout Electronic System for the Vertex Detector of the SVD-2 Setup
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ICATION OF COMPUTERS IN EXPERIMENTS
The Readout Electronic System for the Vertex Detector of the SVD-2 Setup E. N. Ardasheva, S. N. Golovnyaa,*, S. A. Gorokhova, A. A. Kiryakova, V. S. Petrova, V. A. Sen’koa, M. M. Soldatova, Yu. P. Tsyupaa, and V. I. Yakimchuka a Institute
for High Energy Physics (IHEP), Kurchatov Institute National Research Center, Protvino, Moscow oblast, 142281 Russia *e-mail: [email protected] Received March 12, 2020; revised April 10, 2020; accepted May 4, 2020
Abstract—The general architecture and characteristics of the readout electronic system for the vertex detector of the SVD-2 setup at the U-70 accelerator (Kurchatov Institute NRC−IHEP, Protvino) are presented. The SVD-2 setup is intended to study near-threshold charmed-particle production at energies of 50–70 GeV, as well as many-particle processes and collective behavior of particles. The key characteristics of the electronic modules developed for the SVD setup by the Kurchatov Institute NRC−IHEP are briefly described. DOI: 10.1134/S0020441220050279
1. INTRODUCTION The precision vertex detector (PVD) of the “Spectrometer with a Vertex Detector” (SVD-2) setup at the IHEP was designed and repeatedly upgraded by the cooperation of the Institute of Nuclear Physics of the Moscow State University, Joint Institute for Nuclear Research, and IHEP from 1998 till 2019 [1, 2]. Both the configuration of the detecting systems and the PVD readout electronics have changed by today in connection with the overall modernization of the setup. A new system for data acquisition from modules of microstrip detectors was created on the basis of electronic units made to the EuroMISS (multichannel information speed system) standard [3]. The general arrangement of the PVD data readout system and a number of its electronic components are described in this paper. The layout of the PVD modules and counters of the SVD-2 trigger system is shown. The architecture of the electronics for preliminary amplification and control, as well as the logic circuit of the data readout system is presented. The
electronic units used in the readout system for controlling the system and pulse-height data analysis are described. 2. THE LAYOUT OF PVD MODULES AND COUNTERS OF THE TRIGGING SYSTEM Figure 1 shows the layout of PVD modules and counters of the triggering system in the SVD-2 setup. The PVD consists of the beam and tracking parts, which include 16 silicon microstrip detectors. Their main characteristics are presented in Table 1. The PVD modules were tested and adjusted on a dedicated test facility [4]. 3. THE ARCHITECTURE OF THE READOUT ELECTRONICS The previously accumulated experience was taken into account in the manufacture of the new vertex tracking detector. In contrast to the previous version,
Table 1. The key features of the PVD silicon detectors PVD part
Numbers of microstrip silicon detectors
Beam Tracking
Nos. 1–6 Nos. 7–8 Nos. 9–16 Total
Quantity of detectors 6 2 8 16 647
Dimension, mm
Strip pitch, μm
32 32 62
28 28 56
Number of strips per detector 1
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