Quantum Well Nanopillar Transistors

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0913-D03-03

Quantum Well Nanopillar Transistors Shu-Fen Hu1, and Chin-Lung Sung2 1 RDT, National Nano Device Laboratories, 26, prosperity Road I, Science-based Industrail Park, Hsinchu, Taiwan, 30078, Taiwan 2 National Nano Device laboratories, 26, Properity road I, Science-based Industrial Park, Hsinchu, Taiwan, 30078, Taiwan

ABSTRACT We have fabricated vertical quantum well nanopillar transistors that consist of a vertical stack of coupled asymmetric quantum wells in a poly-silicon/ silicon nitride multilayer nanopillars configuration with each well having a unique size. The devices consist of resonant tunneling in the poly-silicon/ silicon nitride stacked pillar material system surrounded by a Schottky gate. The gate electrode surrounds half side of a silicon pillar island, and the channel region exists at all the pillar silicon island. Current-voltage measurements at room temperature show prominent quantum effects due to electron resonance tunneling with side-gate. Accordingly, the vertical transistor offers high-shrinkage feature. By using the occupied area of the ULSI can be shrunk to 10% of that using conventional planar transistor. The small-occupied area leads to the small capacitance and the small load resistance, resulting in high speed and low power operation. INTRODUCTION Confinement of electrons in a zero-dimensional semiconductor quantum dot has opened the way to a whole new class of experiments. As smaller and smaller quantum dots have been created, both the energy scale associated with the Coulomb blockade and the spacing of the single-particle eigenstates has increased. Recently, the developments in vertical transistor structures have produced devices with the potential for scaling down to the nanometer regime.[1, 2] Coulomb blockade effects are likely to become important as devices are scaled down and these have also generated a great deal of interest recently because of potential applications in new devices. Investigations of electron transport in nano-pillars in GaAs/GaAlAs heterostructures with well-defined barriers have shown Coulomb blockade oscillations as individual electrons are added to a quantum dot.[3] Similar structures in silicon are attractive because they are compact, have high, well-defined barrier heights, and are compatible with silicon technology. The vertical structure allows high packing density and the high controllability of layer thicknesses allows formation of an exact number of layers of conducting and insulating materials in which islands of well-defined dimensions and tunnel barriers with high, well-defined barrier heights can be formed. They also have advantages over lateral structures in disordered materials which show Coulomb blockade but do not always give a well-defined and reproducible number of islands and also over patterned nano-structures produced by lithography which present considerable fabrication challenges to obtain reproducible geometries and barrier heights. Fukuda et al.[4] demonstrated that ultra thin Si3N4 barriers can be formed in silicon pillars.