Rapid Thermal Annealing of Composite TaSi 2 /n + Poly-Si Silicide Films
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RAPID THERMAL ANNEALING OF COMPOSITE TaSi
2
/n+ Poly-Si SILICIDE FILMS
D.L. KWONG and R. KWOR Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN 46556 B.Y. TSAUR Lincoln Laboratory, Massachusetts Institute of Technology, Lexington, MA 02173 K. DANESHVAR Allison Laboratory, Auburn, AL 36849
Auburn University
ABSTRACT The formation of composite TaSi 2 /n+ Poly-Si silicide films through the use of rapid thermal annealing (RTA) is investigated by x-ray diffraction, four point probe, scanning Auger microprobes (SAM) with ion sputter etching, transmission electron microscopy (TEM), scanning electron microscopy (SEM), and capacitance-voltage (C-V) measurements. 0.2 Pm polysilicon is deposited on oxidized Si wafer by LPCVD and doped with phosphorus. A layer of 2200 A TaSix is then co-sputtered on polysilicon samples from separate targets. These as-deposited films are then annealed by RTA in an argon ambient for I sec. and 10 sec. at various temperatures. X-ray diffraction and SAM results show the rapid formation of a uniform stoichiometric tantalum disilicide via Si migration from polysilicon. TEM micrographs show simlilar results for samples annealed at 1000 °C in furnace for 30 min. or by RTA for I sec., exhibiting average grain size greater than 1000 A. Sheet resistance of samples annealed by furnace annealing and RTA are comparable. SEM micrographs indicate that the surface morphology of the RTA-annealed sample is superior to that obtained by furnace annealing. These results show that RTA may offer a practical solution to low-resistivity silicide formation in VLSI circuits.
INTRODUCTION With the increasing complexity of VLSI circuits, the use of refractory metal-silicide gates and interconnects in MOS technology is becoming an industry standard. This is largely due to the reduced resistivity of silicides, as compared to polycrystalline silicon, and gate stability during high temperature annealing of ion-implantation damage in self-aligned processes. A polycide structure (metal-silicide/n+ poly-Si) has been shown to be the most promising structure as interconnects and gate electrodes for MOSFET integrated circuits [1-31. Recently, TaSi 2 /polysilicon was found [41 to be an attractive gate metallization for achieving a reduction in the gate level sheet resistance to about 21t/sq., while simultaneously maintaining other beneficial properties such as the ease of silicide formation and patterning, and stability during further processing. Since the as-deposited silicide films are amorphous, it is necessary to perform a high-temperature furnace anneal in order to increase the grain size sufficiently to form a low-resistivity layer. However, such annealing
Mat. Res. soc. Symp. Proc. Vol.
23 (1984)0Elsevier Science Publishing Co., Inc.
734
may lead to unacceptable dopant diffusion in the source and drain regions similar to that observed in semiconductors during prolonged annealing of Moreover, such long time annealing may also cause ion-implantation damage. undesirable effect such as out d
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