Reduction of Residual Transient Photocurrents in A Si:H Elevated Photodiode Array Based Cmos Image Sensors
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REDUCTION OF RESIDUAL TRANSIENT PHOTOCURRENTS IN A SI:H ELEVATED PHOTODIODE ARRAY BASED CMOS IMAGE SENSORS Jeremy A. Theil* Agilent Technologies, Santa Clara, CA, 95051, U.S.A. *current contact information: Lumileds Lighting, LLC, MS 91UJ 370 W. Trimble Rd., San Jose, CA 95131, U.S.A., e-mail: [email protected]
ABSTRACT While a-Si:H based elevated photodiode arrays hold the promise of superior performance and lower cost CMOS-based image sensors relative to those based upon crystalline silicon photodiodes, the one area where a-Si:H based sensor performance has not been as good is in image lag. This problem is only exacerbated by Staebler Wronski Effect induced junction degradation. Image lag is caused by residual charge from photocurrents trapped within the junction once the light source is removed and can be measured for several seconds, even under continuous applied reverse bias. It is seen both in constant and variable bias pixel architectures. However, by carefully controlling a-Si:H junction bias conditions, it is possible to significantly reduce these transient photocurrents. This article will describe how the photocurrent decay time exponent can be reduce by almost an order of magnitude. Finally the physical causes behind image lag in a-Si:H based photodiode arrays will be discussed. 1 INTRODUCTION Over the last ten years, there has been increasing interest in the use of a-Si:H in photodiode arrays that are monolithically integrated onto integrated circuits [1-3]. Such integration allows a combination of 1) reduced imaging pixel area, 2) reduced sensor cost, 3) lower photodiode leakage, and 4) improved pixel sensitivity. As pixel-level complexity (hence area) grows, the advantages become more apparent. The one area where a-Si:H diode-based pixel performance tends to be deficient with respect to all-crystalline silicon pixels is in image lag. Image lag is typified as a persistent afterimage artifact in the array as a result of charge generated by an earlier measurement (hence the transient photocurrent). There are many systemic causes of image lag in all image sensor technologies, but the high trap-state density of a-Si:H provides an additional mechanism through prolonged carrier emission. In addition, since most a-Si:H diode array architectures use a continuous i-layer to maximize the light gathering area of the array, the junction construction itself may contribute. Therefore we created a novel parametric test structure to try to elucidate various potential mechanisms in a realistic array. The motivation behind this work is to start to identify the causes of this transient photocurrent and how see if there are ways to mitigate it. 2 EXPERIMENTAL Details of diode fabrication have been presented elsewhere, the resulting structure is pictured in Figure 1a [1,2,4]. All test structures are bounded by a ring diode that is held at the same bias as the measurement structure itself to eliminate injected edge currents. The test structure used in this experiment is a two-channel 2-D interpenetrating dio
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