SiGeC Cantilever Micro Cooler
- PDF / 130,313 Bytes
- 7 Pages / 612 x 792 pts (letter) Page_size
- 33 Downloads / 146 Views
S11.3.1
SiGeC Cantilever Micro Cooler Gehong Zeng, Ali Shakouri1*, Edward Croke2, Yan Zhang1, James Christofferson1 and John E. Bowers** Department of Electrical and Computer Engineering, University of California Santa Barbara, CA 93106,**[email protected] 1 Baskin School of Engineering, University of California, Santa Cruz, CA 95064, *[email protected] 2 HRL Laboratories, LLC, Malibu, California, 90265 ABSTRACT The fabrication and characterization of SiGeC cantilever microcoolers are described. Silicon on insulator (SOI) was used as the substrate, and two layers of 3 µm p-SiGe0.07C0.0075 and 1.14 µm n-SiGe0.07C0.0075 lattice matched to silicon were grown using molecular beam epitaxy. The uni couple cooler was fabricated using conventional integrated circuit (IC) processing, and the cantilever structure was finally formed by removing the backside Si of SOI substrate by deep reactive ion etching. Devices with different n- and p-side length ratios were characterized. Cooling by 1.2K has been measured at room temperature. Modeling showed that the device performance was dominated by the smaller cooling temperature of the p-SiGeC leg of the cantilever structure. Parasitic heat conduction through the Si buffer layer is the main limitation to the device performance. INTRODUCTION Heat generation and thermal management are becoming one of the barriers to further increase speeds and decrease feature sizes in integrated circuits. Thin film coolers that can be monolithically integrated with high speed, high power electronic and optoelectronic devices have been an active area of research [1-3]. Due to the larger lattice constant of germanium compared to silicon (4.2%), Ge and SiGe grown on silicon are compressively strained, thus buffer layers are required for the growth of thick Si/Ge and SiGe/Si superlattice layers. This increases the cost of material growth and the complexity of integration with Si-based devices. By adding a small amount of carbon into the SiGe material system, strain can be adjusted due to the small lattice constant of carbon. By properly selecting the Ge and C ratio, SiGeC can be lattice matched to silicon, and thick SiGeC or SiGeC/Si superlattice can be directly grown on Si without strain. For potential integration with silicon circuits, studies on SiGe/Si and SiGeC/Si microcoolers have been carried out [4-6]. Single element microcoolers are usually limited by the heat conduction from substrate to the cooling side via electrode metal pads. In addition, in these short leg structures, transferring the heat perpendicular to the thin film layer, requires large current densities and thus Joule heating in the electrodes and in metal-semiconductor contact layer could dominante. Using a cantilever structure to transfer heat in the plane of the thin film is a promising solution to the problems for micro coolers [7-9]. Previous demonstrations used selective growth of n- and p-layers in different areas of the substrate and there were limitations due to the material quality. Here we use an alternative solution with
Data Loading...