Solid-state bonding of silicon chips to copper substrates with graded circular micro-trenches
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Solid-state bonding of silicon chips to copper substrates with graded circular micro-trenches Yi‑Ling Chen1,2 · Jiaqi Wu1,2 · Chin C. Lee1,2 Received: 13 February 2018 / Accepted: 3 April 2018 © Springer Science+Business Media, LLC, part of Springer Nature 2018
Abstract Silicon (Si) chips of 5 mm × 5 mm were bonded directly to copper (Cu) substrates using solid-state process at 300 °C without using any die-attach materials. A static pressure of 6.9 MPa was applied. To deal with the large mismatch in coefficient of thermal expansion (CTE) between Si and Cu, graded circular micro-trenches were fabricated on the Cu substrates. The micro-trenches provide space for Cu material to move into during the bonding process where the Cu surface incurs plastic deformation to conform to Si bottom surface for intimate contact. The micro-trenches also help relax stresses on the bonding interface caused by the fact that Cu contracts significantly more than Si during cooling down. The results obtained are encouraging, implying that the concept of using micro-trenches work. Scanning electron microscopy (SEM) images on cross sections of bonded structures show that Si chips were well bonded to Cu substrates without voids or defects on the interface and without any cracks on Si chip. Shear test were performed on six samples. It turned out that, of all six samples, the Si chip fractured first and the entire Si bottom surface was stilled well bonded to the Cu substrate. The average breakage force of Si chips on six samples is 13.5 Kgf. The breakage force of the joint cannot be determined but is certainly higher than 13.5 Kgf, which is more than twice of the specification American Military Standard. The new chip bonding structure with solid-state process reported in this paper eliminates the use of die-attach materials and the thermal resistance associated with the dieattach. It also removes the operating temperature limit constrained by the melting temperature of die-attach materials. We except this new bonding structure design to be a valuable alternative to high power and high temperature devices.
1 Introduction Nowadays, in view of the advance of high density integrated circuits (ICs) and high power devices, the density of power dissipation has been in rapid growth, which requires better thermal management solutions. In electronic packaging, the die-attachment is usually the place that inhibits efficient heat conduction. To reduce its thermal resistance, materials with high thermal conductivity and high temperature stability are highly preferred as the die-attachment material. The melting temperature of traditional high temperature solders such as gold–tin (Au–Sn) eutectic and high-lead (Pb) alloys is limited to 300 °C [1]. Higher temperature alloys require even higher process temperature to melt the alloy. A technique * Jiaqi Wu [email protected] 1
Electrical Engineering and Computer Science, University of California, Irvine, CA 92697‑2660, USA
Materials and Manufacturing Technology, University of California, Irvine, CA 92697‑2
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