Stress and Defect Generation in Si Epitaxy
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Stress and Defect Generation in Si Epitaxy Tien Wang and Douglas Carlson Advanced Materials Group, Microwave Solutions Business Unit, M/A-COM, Inc. 43 South Avenue, Burlington, MA 01803 ABSTRACT A quasi-static model is proposed to describe wafer deformation due to stress build up in the Si epitaxy process. The analysis takes into account temporal stress variations as the wafer sags into the dish-shaped pocket of the susceptor at a deposition temperature above 1100 oC. It is shown that the magnitude of the negative bending moment at the wafer supporting edge decreases over time. As a result, the maximum deflection at the wafer center and the tensile stress at the wafer supporting edge also decrease over time. The generation of slip defects near the wafer edge as the wafer responds the thermal, gravitational and contact stress is explored. A new test methodology is developed to track the time-varying wafer deflection. It allows for the measurement of quality of the susceptor and its fitness for use in the reactor system.
INTRODUCTION Slip in silicon epitaxy occurs when the thermal-mechanical stress in the wafer exceeds the yield strength of silicon. The stress level depends on the process condition and the flexural rigidity of the wafer expressed in terms of elastic modulus, Poisson’s ratio and thickness. In rf-heated reactor systems, a dish-shaped susceptor pocket has been used to reduce thermal stress across wafer and slip [1]. Since the wafer is edge supported with its bulk suspended over the pocket, the stress distribution changes significantly. The wafer gradually sags into the pocket and the stress profile changes over time due to the increasing contact between wafer and pocket. As wafer size increases, the impact of stress profile on slip becomes even more significant and so is the cost associated with wafer scrap [2-4]. In this work, slip generation in silicon epitaxy using a dish-shaped susceptor pocket is explored. The wafer sagging at high temperature is measured from the transfer pattern recorded on the wafer backside from the coated susceptor. A quasi-static model is proposed to describe the transient thermo-mechanical stresses during the process. It is found that morphology of the coating nodules on pocket surface has a profound effect on slip generation.
EXPERIMENTAL DETAILS The epitaxial wafers are grown in a Gemini II vertical VPE reactor rf-heated to a growth temperature of 1135 oC using SiHCl3 as the source gas. 100 mm φ, As-doped Si(111) wafers are loaded in dish-shaped pockets on a SiC-coated graphite susceptor. The
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Figure 1. Transfer pattern on the surface of a 100 mm Si wafer loaded facedown in susceptor pocket. depth of the susceptors pocket is 3 mil and the pocket surface is populated with surface nodules due to columnar growth of the carbide coating. After growth, the surface of the wafer is examined using Nomarski interference micoroscopy. The surface defects are further characterized using a Dektak profilometer and atomic force microscopy.
DISCUSSION Wafer sagging in
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