Study of Modulation in GaAs Misfets with LT-GaAs as a Gate Insulator
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STUDY OF MODULATION IN GaAs MISFETs WITH LT-GaAs AS A GATE INSULATOR L.-W. Yin, J. Ibbetson, M.M. Hashemi, W. Jiang, S.-Y. Hu, A. C. Gossard and U.K. Mishra
University of California, ECE Department, Santa Barbara, California.
ABSTRACT DC characteristics of a GaAs MISFET structure using low-temperature GaAs (LTGaAs) as the gate insulator were investigated. MISFETs with different gate to channel separation (d) were fabricated. The dependence of four important device parameters such as gate-drain breakdown voltage (VBR), channel current at zero gate bias (Idss), transconductance (gm), and gate-drain turn-on voltage (Von) on the gate insulator thickness were analyzed. It was observed that (a) in terms of Idss and gin, the LT-GaAs gate insulator behaves like an undoped regular GaAs layer and (b) in terms of VBR and Von, the LT-GaAs gate insulator behaves as a trap dominated layer.
INTRODUCTION Low temperature gallium arsenide (LT GaAs), grown by molecular beam epitaxy 0 (MBE) at a low substrate temperature around 200 C [1], has recently attracted a lot of attention. It has been shown by many groups [ 1-4] that LT GaAs behaves quite differently depending upon growth condition (i.e substrate temperature, V/III ratio, post growth anneal) ranging from being highly resistive (>106 .- cm) to being conductive (~10 n-cm). 0 In-situ postgrowth annealing of LT GaAs, grown at 2000C, for 10 minutes at 580 C, has been shown to result in a highly resistive and optically inactive insulating layers possibly due to approximately 1-2 at. % excess arsenic[l] and a large amount of antisite defects. When it is used as a buffer layer for GaAs metal-semiconductor field effect transistors (MESFETs), LT GaAs has largely eliminated sidegating ( or backgating ) effects and substantially reduced the output conductance[l]. When it is used as a gate insulator layer for GaAs metal-insulator-semiconductor field effect transistors (MISFETs), LT GaAs has significantly enhanced the breakdown voltage between the gate and the drain without sacrificing the channel current[2] and also greatly increased the output power density[3]. However, unannealed-LT GaAs has been shown to be very conductive due to hopping mechanism[4] through a deep level defect band. Obviously, unannealed-LT GaAs material will not be suitable as a buffer layer in MESFETs or as a gate insulator layer in MISFETs. There is a fundamental difference between the thickness of LT GaAs as a buffer layer in MESFETs and as a gate insulator layer in MISFETs. While the former is typically up to 2 tm thick, the gate insulator layer needs to be as thin as possible ( 500A-2000A ) to optimize device characteristics such as transconductance, etc. In this work we investigate the dependence of four important MISFET parameters such as transconductance (gm), channel current at zero gate bias (Idss), the gate-drain breakdown voltage (VBR), and the gate-drain turn-on voltage (Von) on the thickness of LT-GaAs gate insulator.
Mat. Res. Soc. Symp. Proc. Vol. 241. ®1992 Materials Research Society
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