Study on the Effect of RTA Ambient to Shallow N+/P Junction Formation using PH3 Plasma Doping
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1070-E03-06
Study on the Effect of RTA Ambient to Shallow N+/P Junction Formation using PH3 Plasma Doping Seung-woo Do1, Byung-Ho Song1, Ho Jung1, Seong-Ho Kong1, Jae-Geun Oh2, Jin-Ku Lee2, Min-Ae Ju2, Seung-Joon Jeon2, Ja-Chun Ku2, and Yong-Hyun Lee1 1 School of Electrical Engineering and Computer Science, Kyungpook National University, Daegu, 702-701, Korea, Republic of 2 Hynix Semiconductor Inc., Kyoungki-do, 467-701, Korea, Republic of ABSTRACT Plasma doping (PLAD) process utilizing PH3 plasma to fabricate n-type junction with supplied bias of –1 kV and doping time of 60 sec under the room temperature is presented. The RTA process is performed at 900 °C for 10 sec. A defect-free surface is corroborated by TEM and DXRD analyses, and examined SIMS profiles reveal that shallow n+ junctions are formed with surface doping concentration of 1021atoms/cm3. The junction depth increases in proportion to the O2 gas flow when the N2 flow is fixed during the RTA process, resulting in a decreased sheet resistance. Measured doping profiles and the sheet resistance confirm that the n+ junction depth less than 52 nm and minimum sheet resistance of 313 Ω/□ are feasible.
INTRODUCTION Transistor doping challenges for advanced technology nodes, illustrated by the recent international technology roadmap for semiconductor (ITRS 2005), include high dose and low energy implants for gate, source/drain and source/drain extension dopings[1]. As the scaling down of metal oxide semiconductor (MOS) device continues, MOS device requires ultra shallow source/drain junction depth to reduce the short channel effect and enhance the performance of the devices[2,3]. Among many doping techniques to form a ultra shallow junction, the plasma doping (PLAD) has attracted much attention due to the high-dose ion doping with low ion energy, high activation efficiency, reduced damage and improved doping profile[4,5]. PLAD is a surface treatment technique characterized by the implantation of energetic ions that are generated by immersing the substrate into plasma and applying a pulsed negative voltage to the substrate [6]. In this study, n+ shallow junctions are formed using PLAD technique and rapid thermal annealing (RTA) method. The PLAD is followed by RTA process performed either in N2, O2 or O2+N2 ambient.
EXPERIMENT The PLAD is performed on (100) p-type silicon wafer using a plasma doping system. A standard wafer cleaning process is performed followed by a diluted HF dip to remove native oxide prior to loading the wafer in the plasma doping system. Plasma doping source is gas mixture of 10 % PH3 diluted with He. The argon gas is injected to the process chamber to help the first ignition of plasma and stopped just before the bias voltage applying. The wafer is placed in the plasma generated with 200 W and a negative DC bias (–1 kV) is applied to the substrate for 60 sec under no substrate heating. The flow rate of the diluted PH3 and the process pressure are 100 sccm and 10 mTorr, respectively. After PLAD, RTA process performed either in N2, O2 or O2+
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