The Formation of Nano-voids in electroless Cu Layers
- PDF / 629,803 Bytes
- 10 Pages / 432 x 648 pts Page_size
- 38 Downloads / 368 Views
MRS Advances © 2019 Materials Research Society DOI: 10.1557/adv.2019.336
The Formation of Nano-voids in electroless Cu Layers T. Bernhard1, S. Branagan2, R. Schulz1, F. Brüning1 , L. Stamp1, K.Wurdinger1, S.Kempa1 1
Atotech Deutschland GmbH, Erasmusstrasse 20, 10553 Berlin, Germany
2
Atotech USA, 255 Fuller Rd, 12203 Albany, USA
ABSTRACT
The electrical reliability of multilayer high density interconnection printed circuit boards (HDI-PCBs) is mainly affected by the thermo-mechanical stability of stacked micro via interconnections. Here, a critical failure mode is the stress related crack between the electrolytically filled via and the target pad, commonly known as target pad separation. The junction includes two Cu-Cu-interfaces, one between the target Cu pad and the thin electroless Cu layer and the second between electroless Cu and electrolytic Cu. In this paper we will show that state-of-the-art electroless Cu plating processes are able to provide solid, completely recrystallized and highly reliable stacked via junctions. Defect free interfaces were achieved by using ionic Pd-activators and electroless Cu baths with a cyanide based stabilizer system. Cyanide free electroless Cu baths tend more to the formation of nanometer sized defects, discovered via Transmission Electron Microscopy (TEM). In this case a precise adjustment of single stabilizer components is mandatory to achieve defect free layers. The defects are hollow and were identified as “nano voids”. A critical density of these nano voids weakens the interface, predefines the crack path and reduces the overall reliability of the junction. A precise localization of the nano voids within the junction was enabled by detecting the Ni-containing electroless Cu layer via TEM-Ni mapping. Slower volume exchange of the electroless Cu solution within the blind micro via (BMV) substantially increases the nano void density. The ability of nano voids to migrate and coalesce at elevated temperatures was investigated as well.
2231
Downloaded from https://www.cambridge.org/core. University of Texas Libraries, on 09 Jan 2020 at 01:28:56, subject to the Cambridge Core terms of use, available at https://www.cambridge.org/core/terms. https://doi.org/10.1557/adv.2019.336
INTRODUCTION The continuous advancement of Printed Circuit Board (PCB) technology is driven by the miniaturization of components and semiconductor packages that supports a higher functionality of microelectronic products. The multilayer HDI-technology enables more functions per unit area on the PCB and provides the necessary routing solution for today's large pin-count chips utilized in mobile devices and other high technology products. HDI-PCBs are composed of multiple circuitry layers typically separated by an insulating laminate. The vertical connection from layer to layer consists of a Cu-filled microvia, realized by a process sequence of laser drilling, electroless Cu- and galvanic Cu plating and structuring. Stacked microvias, as shown in Fig. 1a, are formed if multiple circuitry layers have
Data Loading...
