The Performance of The Fast Ramp Vertical Furnace
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SEMATECH completed a feasibility study in 1995 of the fast ramp furnace and found that it was advantageous to develop a production fast ramp furnace. The feasibility study showed that the fast ramp furnace would reduce thermal exposure of the wafers, reduce Once this was completed, cost ownership and help balance a production line. SEMATECH investigated potential suppliers to develop the tool. Semitool was the supplier of choice and a member company was chosen to beta site the furnace. The tool developed for the demonstration is the Semitool Express. The Express is capable of processing a variable load size of 50 to 200 wafers per run. The fast ramp rate is adjusted for load size and wafer space to prevent thermal damage to the wafers. The furnace is controlled with model based temperature control, heated by a proprietary metallurgical powder wire element, and cooled with compressed air. Process performance of the furnace was tested through 10 run passive data collections (PDC's) for a 9001C 145 ohm/sq boron source/drain (S/D) implant anneal and a 900 °C 65 angstrom gate oxidation process. All recipes were run with model-based temperature control, fast ramp and fast cool. The process performance goals for this project were set in conjunction with the 1994 National Technology Road Map for Semiconductors.
193 Mat. Res. Soc. Symp. Proc. Vol. 470 0 1997 Materials Research Society
Experiment: Two SEMITOOL fast ramp furnaces were evaluated. The alpha tool was tested at SEMITOOL and the beta tool was tested at the member company. Passive data collections (PDC) were used to demonstrate the process performance of the Express furnace. Once the PDC test is started, no adjustments may be made to the tool. The furnace uses model based temperature control to control the furnace element. Model based temperature control needs to be tuned through temperature data logs of the actual temperature in the furnace during an entire process cycle [1]. This was done with SensArray(TM) wafers. 200 mm SensArray(TM) wafers used for this project were configured with a thermal couple at the center and a thermal couple three millimeter from the edge. Seven SensArray(TM) wafers are loaded into the furnace adjacent to profile thermocouples that spanned over the 25 inch flat temperature zone. The SEMITOOL furnace has seven heating element zones. The SensArray wafers measured the temperature difference across the wafer during ramping the furnace up and down [1]. From the SensArray(TM) thermocouple measurements the model for model based temperature control was adjusted. Once the furnace was tuned in, the SensArray wafers were removed, so the furnace could be used for processing. Alpha Site: Fast ramp tests, fast cool tests and a ten run boron Source/Drain (S/D) anneal PDC were conducted at Semitool [2]. The ten run PDC was run with 3 test wafers per run: top (slot 213), center (slot 113) and bottom (slot 13). The furnace has a 221 wafer 1/8" spaced slotted tower. The pitch between wafers is 1/2". The filler wafers were loaded as follows: two filler
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