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The possible current-conduction mechanism in the Au/ (CoSO4-PVP)/n-Si junctions Hasan Elamen1, Yosef Badali2,*

, Muhammet Tahir Gu¨nes¸ er1, and S¸ emsettin Altındal3

1

Department of Electrical & Electronics Engineering, Karabük University, Karabük, Turkey Department of Electrical & Electronics Engineering, Antalya Bilim University, Antalya, Turkey 3 Department of Physics, Gazi University, Ankara, Turkey 2

Received: 3 August 2020

ABSTRACT

Accepted: 2 September 2020

The possible current-conduction mechanism (CCMs) of the Au/CoSO4-PVP/nSi junctions was investigated using temperature-dependence current–voltage (I– V) experiments over 100–360 K. The experimental results showed that the value of BH increases approximately linearly with increasing temperature. Such positive temperature coefficient (a = DUB0/DT) is in agreement with the reported negative temperature coefficient of the bandgap of Si (= - 0.473 meV/K). The (nap-1-1) vs q/2kT curves have different characters in two temperature ranges due to having separate two barrier distributions. The q2 and q3 values obtained from intercept and slope of these curves as 0.521 V and 0.011 V for 240–360 K temperature range and 0.737 V and 0.004 V for the 100–220 K range. This results show that the high temperature region with smaller q2 and larger q3 voltage deformation coefficients has a wider and greater of the barrier height distribution than the second region. As an evidence for the Gaussian distribution, the UB0 and standard deviation (r0) were derived from the intercept and slope of the UB0-q/2kT curves as 1.14 eV and 0.163 V at high temperatures and 0.62 eV and 0.088 V at low temperatures. The Richardson constant obtained as 102 A/cm2K2 for 240–360 K temperature range using standard deviation value which is similar to the theoretical Richardson constant value of silicon (112 A/cm2K2). For each temperature, the profile of Nss vs (Ec–Ess) was provided using the voltage-dependent effective barrier height (Ue) value. It was observed that these surface conditions decreased with increasing temperature.



Springer Science+Business

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Address correspondence to E-mail: [email protected]

https://doi.org/10.1007/s10854-020-04406-3

J Mater Sci: Mater Electron

1 Introduction Recently, the high-j dielectrics such as Si3N4, TiO2, HfO2 and CoSO4 have been used between metal and semiconductor in Schottky devices instead of traditional low dielectric materials to increase performance of them [1–5]. The creation of these high-j dielectric at metal/semiconductor interface is believed to both prevent diffusion between of them, and increase the performance of the diode by passivating many of the surface states (Nss) at interfacial layer. In addition, such thin interface materials significantly reduce the leakage currents and increasing the rectification rate (RR) of diodes. On the other hand, it considerably reduces the series resistance (Rs) and also increases the short circuit resistance (Rsh) of the diode. In this way, it is ensu