Theoretical and Experimental Studies on Retention Characteristics of Metal-Ferroelectric-Insulator-Semiconductor and Met
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Theoretical and Experimental Studies on Retention Characteristics of Metal-Ferroelectric-Insulator-Semiconductor and Metal-Insulator -Ferroelectric-Insulator-Semiconductor Structures Masanori Okuyama, Mitsue Takahashi, Kazushi Kodama, Toshiyuki Nakaiso and Minoru Noda Area of Materials and Device Physics, Department of Physical Science, Graduate School of Engineering Science, Osaka University, Toyonaka, Japan ABSTRACT Retention characteristics of Metal-Ferroelectric-Insulator-Semiconductor(MFIS) and Metal-Insulator-Ferroelectric-Insulator-Semiconductor(M-I-FIS) structures have been investigated both theoretically and experimentally. The simulated time dependence of capacitance for the MFIS has indicated that reducing currents through the ferroelectric and the insulator layers improves the retention characteristics more effectively than choosing the insulators with larger dielectric constants. The M-I-FIS structure has been studied in order to reduce the charge injection between the metal and the ferroelectric layer in the MFIS. The simulations have indicated that the M-I-FIS can provide much longer retention time than the original MFIS, although the experimental retention time of the M-I-FIS have almost the same as that of the MFIS. INTRODUCTION Metal-Ferroelectric-Insulator-Semiconductor (MFIS) has been attracting much attention as one of favorable structures for a practical use in FET-type nonvolatile memories. The structure is regarded as a useful memory with nondestructive readout operation, which follows a good scaling-down rule. However, only a few ferroelectric gate FET memories have shown long retention times so far[1, 2], while many other MFS and MFIS structures have still shown short retention times. These structures cannot avoid currents in the ferroelectric and the insulator layers, which are caused by several factors such as ion drifts, thermal- and field- induced relaxation of polarization and carrier conduction induced by an intrinsic depolarization field which has the opposite direction to the ferroelectric spontaneous polarization. These currents are supposed to make retention characteristics worse. In this article, time dependence of capacitance has been simulated for an MFIS structure on the assumption that the current through the ferroelectric layer increases charges injected into the interfacial region between the metal and the ferroelectric layers and compensates the field imposed on the layer. The simulation has reproduced well our previous experimental data[3], which indicates the validity of our model. In order to improve retention characteristics of the MFIS by reducing the current from the top electrode metal, we have studied the effect of preparing a thin insulator layer under the metal on the retention time. This structure called as a Metal-Insulator-Ferroelectric-Insulator-Semiconductor (M-I-FIS) has been investigated both theoretically and experimentally. ANALYSIS Process of retention loss has been simulated by solving numerically several electrodynamic simultaneous equations such as a
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