Thermoelectric Properties of p and n-type Nanocrystalline Silicon Nanowires with High Doping Levels
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Thermoelectric Properties of p and n-type Nanocrystalline Silicon Nanowires with High Doping Levels F. Suriano1, M. Ferri1, S. Solmi1, L. Belsito1, A. Roncaglia1, E. Romano2, D. Narducci2, G. Cerofolini2 1 Institute of Microelectronics and Microsystems, CNR, Via Gobetti 101, I-40129 Bologna, Italy 2 CNISM and Department of Materials Science, University of Milano – Bicocca, Via Cozzi 53, 20125 Milano, Italy ABSTRACT An experimental investigation about the thermoelectric properties of heavily doped p ad n-type nanocrystalline silicon nanowires (NWs) is described. The NWs are produced with low cost CMOS compatible processes, highly customizable in terms of cross-section and placement, which enables the fabrication of both stacked NWs in nearly vertical arrays within nanostructured templates built with SiO2/Si3N4 thin films and individual, freestanding NWs suited for thermal conductivity measurements. The cross-section dimensions of the investigated NWs range between 30 and 120 nm in size and up to about 2 cm in length. The structure of the NWs, as shown by SEM/TEM observations, is nanocrystalline with average size of the nanocrystals in one dimension that is comparable with the nanowire diameter. On the NWs, Seebeck coefficient, electrical resistivity and thermal conductivity have been measured, yielding thermoelectric figure of merit (ZT) values of 0.2 at 300 K for the best case. INTRODUCTION The interest in silicon as a thermoelectric material, ruled by the thermoelectric figure of merit ZT (with Z defined as 2/( k), being thermoelectric power, electrical resistivity and k thermal conductivity), has recently grown up scaling silicon from bulk ZT (around 0.01 at room temperature) to the nanowire (NW) form, thus enhancing the ZT value at room temperature of about two orders of magnitude [1]. This value puts side by side silicon nanowires and the most widely used materials for high efficiency thermoelectric conversion, like Bi2Te3. In this work, the thermoelectric figure of merit ZT is investigated on highly doped nanocrystalline silicon NWs produced by low cost, CMOS compatible processes, in which the NWs cross-section and placement is highly customizable. EXPERIMENTS The NWs used in the measurements have been fabricated by two different process flows, according to the measurement needed. The NWs for the Seebeck coefficient measurement, in particular, have been fabricated using the process already reported in [2 4] that yields stacks of Si NWs like the one shown in the SEM images of Fig. 1 below. As it may be observe in the figure, this fabrication technique permits to obtain stacked nanowires (four levels for the cross-section reported in the figure) embedded within a nanostructured dielectric template made by SiO2/Si3N4 thin films (which is exploited for the NWs fabrication) and contacted with an Al/Si metallization.
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Si3N4 SiO2
Al/Si Si nanowire
Figure 1. SiO2/Si3N4 nanostructured template for NWs fabrication (left) and crosssection of NWs with Al/Si metallization (right). The NWs for thermal conductivity mea
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