Thermoelectric Properties of Silicon Nanowire Array and Spin-on Glass Composites Fabricated with CMOS-compatible Techniq
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Thermoelectric Properties of Silicon Nanowire Array and Spin-on Glass Composites Fabricated with CMOS-compatible Techniques Benjamin M. Curtin and John E. Bowers Dept. of Electrical and Computer Engineering, University of California, Santa Barbara, CA ABSTRACT Silicon nanowires (NWs) are promising thermoelectric materials as they offer large reductions in thermal conductivity over bulk Si without a significant decrease in the Seebeck coefficient or electrical conductivity. In this work, interference lithography was used to pattern a square lattice photoresist template over 2 cm x 2 cm Si substrates. The resulting vertical Si NW arrays were 1 m tall with a packing density of ~15%, and the diameter of the Si NWs were 80 90 nm. The Si NW arrays were then embedded in spin-on glass (SOG) to form a dense composite material with a measured thermal conductivity of 1.45 W/m-K at 300 K. Devices were fabricated for cross-plane Seebeck coefficient measurements and the Si NW/SOG composite was found to have a Seebeck coefficient of roughly -284 μV/K, which is similar to bulk Si with the same doping. We also report a combined power generation of 29.3 μW from both the Si NW array and Si substrate with a temperature difference of 56 K and 50 μm x 50 μm device area. INTRODUCTION Bulk silicon is considered a poor thermoelectric material due to its high thermal conductivity, which results in a low thermal to electrical energy conversion efficiency. This conversion efficiency is directly related to the dimensionless thermoelectric figure of merit ZT, which is defined as (S2ıT)/ț, where S is the Seebeck coefficient, ı is the electrical conductivity, ț is the total thermal conductivity, and T is the average temperature. Commercial thermoelectric materials such as Bi2Te3 typically have a ZT of ~1 at 300 K, which is nearly two orders of magnitude larger than bulk Si.[1] Despite the low ZT of bulk Si, its high temperature stability, abundance, and large-scale manufacturability are characteristics of an ideal thermoelectric material, and methods to improve ZT are worth investigating. Recently, Si nanostructures have been shown to greatly suppress phonon heat conduction and several studies indicate that these materials may exhibit a bulk-like power factor (S2ı).[1-4] Hochbaum et al. demonstrated ZT of ~0.5 at 300 K for a 50 nm diameter rough Si NW due to a 100x decrease in thermal conductivity and comparable power factors to similarly doped bulk Si.[1] While these studies have focused on individual Si NW measurements, efficient thermoelectric devices must consist of dense arrays of Si NWs that are fabricated with conventional processing methods.[5] Lateral arrays of vapor-liquid-solid grown Si NWs have been used as a platform for planar thermoelectric power generators, which resulted in a significant thermal resistance across the NW array.[6] Vertical Si NW array power generators were also demonstrated using a top-down approach, but with relatively low packing densities.[7] APPROACH In this work, vertical Si NW arrays were fabricated directly
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