Ultra Low Thermal Budget Rapid Thermal Processing for Thin Gate Oxide Dielectrics: Reduction of Suboxide Transition Regi
- PDF / 518,074 Bytes
- 6 Pages / 414.72 x 648 pts Page_size
- 52 Downloads / 178 Views
processing are the focal point of the paper. One issue relates to nitrogen atom incorporation at the Si-Si0 2 interface [3,4], and the second to interface roughness [5], which is equivalent to interface transition regions with sub-oxide bonding arrangements above and beyond the normal suboxide bonding at the metallurgical boundary between the Si and the dielectric. These two aspects of interfacial bonding have been studied by Auger electron spectroscopy (AES) [6,7], optical second harmonic generation (SHG) [6 and refs. therein] and X-ray photoelectron spectroscopy (XPS) [8]. This paper will discuss the AES measurements in some detail, and then show how these measurements as well as XPS have aided in our understanding of the SHG results EXPERIMENTAL: INTERFACE FORMATION AND FILM DEPOSITION The AES results presented in this paper have been obtained using a ultra high vacuum (UHV) compatible multichamber system that has separate chambers for remote plasma processing, rapid thermal processing (RTP) and on-line AES. This system provides for i) fabrication of Si-Si0 2 interface structures by either remote plasma assisted oxidation (RPAO) or rapid thermal oxidation (RTO), iii) deposition of oxide and/or nitride dielectric thin films by remote plasma enhanced chemical vapor deposition (RPECVD) and ii) structural and chemical relaxation of these interfaces and film by rapid thermal annealing (RTA). Two different oxygen/nitrogen atom source gases have been used: 02 and N20 for the RPAO and RTO steps [4]. For both the RPAO and RTO processes, the surfaces p-type Si(100) wafers were prepared by a two-stage process: either a high temperature (-900'C) thermal oxidation or a conventional RCA clean process to grow a sacrificial oxide layer that is removed by rinsing in dilute HF leaving a hydrogen terminated surface. Wafers 355 Mat. Res. Soc. Symp. Proc. Vol. 470 0 1997 Materials Research Society
were then inserted into the plasma processing chamber of the system via a load lock sample introduction chamber. For the RPAO process, they were heated to 3000C at the chamber base pressure, -10-8 Torr, and then subjected to plasma-assisted oxidation. The RPAO process is the first step of a two step process for the formation of gate oxides [2]. In addition to forming a thin oxide, -0.5 to up to 1.5 nm thick, the RPAO process reduces levels of interface contamination, e.g. residual C and F concentrations are at the 1012 cm-2 level [3]. In the application of RPAO to gate oxide fabrication, -0.5-6 nm of oxide is grown at 300'C by remote plasma excitation of either He/02 or He/N20 mixtures {RF power of~-30 W at 13.56 MHz}, and this is followed by remote plasma enhanced chemical deposition (RPECVD) of the remainder of the oxide film [2,3]. Thicker films with oxide thicknesses to -1.5 nm, have also been grown by the RPAO process by extending the oxidation time [3]. Finally, for comparison, AES studies were also performed on interfaces prepared by RTO using 02 and N20 sources gases. The RTO processes were performed at 800'C with source gas flow
Data Loading...
