Ultra Shallow Junctions Optimization with Non Doping Species Co-implantation
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0912-C01-02
Ultra Shallow Junctions Optimization with Non Doping Species Co-implantation Nathalie Cagnat1, Cyrille Laviron2, Daniel Mathiot3, Blandine Duriez4, Julien Singer4, Romain Gwoziecki2, Frédéric Salvetti4, Benjamin Dumont5, and Arnaud Pouydebasque4 1 Ion Implantation R&D, STMicroelectronics, 850, rue Jean Monnet, Crolles, France, 38926, France, Metropolitan 2 LETI, CEA-Grenoble, Grenoble, France, 38054, France, Metropolitan 3 InESS, Strasbourg, France, 67037, France, Metropolitan 4 Philips, Crolles, France, 38926, France, Metropolitan 5 STMicroelectronics, Crolles, France, 38926, France, Metropolitan
ABSTRACT The permanent decrease of the transistor size to improve the performances of integrated circuits must be accompanied by a permanent decrease of the depth of the source-drain junctions. At the same time, in order to keep acceptable sheet resistance values, the dopant concentration in the source-drain areas has to be continuously increased. A possible technological way to meet the junction depth and abruptness requirements is to use co-implantation of non doping species with classical implantations, especially for light ions as B or P. In order to clarify the complex interactions occurring during these co-implantation processes, we have performed an extensive experimental study of the effect of Ge, F, N, C and their combinations on boron. A special interest was given to the overall integration issues. We show that it is required to optimize the respective locations of co-implanted species with respect to the B profiles (more precisely the ion implantation damage locations), as well as the coimplanted species doses, to get an acceptable compromise between the efficient diffusion decrease required for the junction abruptness and depth, and a reasonable current leakages. INTRODUCTION Decreasing Boron diffusion is the subject of a lot of research from a long time. This is necessary to continue to increase the device performance, while increasing their density of integration, i.e. shrinking their size. In particular, it is necessary to achieve high dose extension without Short Channel Effect for PMOS devices, and also to better localize the pocket for NMOS devices. The major problem is the strong Boron diffusion enhancement linked to the high amount of excess self-interstitials (I) inevitably present after ion implantation. This is related to the microscopic diffusion mechanism of boron, which diffuses essentially thanks to highly mobile B-I pairs [1, 2], the concentration of which is proportional to the concentration of the excess interstitials. Several solutions have been developed like: Using hot spike anneals with high ramp rates, but this introduces other difficulties notably for uniformity all along the wafer and repeatability.
Implanting BF2 instead of B. This results in shallower junction after annealing. However, a main drawback of fluorine is to enhance B penetration in the gate oxide, thus leading to threshold voltage shifts. Deep preamophization implantation (PAI), in order to reduce channelin
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