Ultrathin flexible InGaZnO transistor for implementing multiple functions with a very small circuit footprint
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Ultrathin flexible InGaZnO transistor for implementing multiple functions with a very small circuit footprint Chaoqi Dai1,2,§, Peiqin Chen2,§, Shaocheng Qi2,§, Yongbin Hu2,§, Zhitang Song3,4 (), and Mingzhi Dai2,3 () 1
College of Materials Science and Engineering, Kunming University of Science and Technology, Kunming 650093, China Ningbo Institute of Materials Technology and Engineering, Chinese Academy of Sciences, Ningbo 315201, China 3 Center of Materials Science and Optoelectronics Engineering, University of Chinese Academy of Sciences, Beijing 100049, China 4 Shanghai Microsystem and Information Technology Institute, Chinese Academy of Sciences, Shanghai 200433, China § Chaoqi Dai, Peiqin Chen, Shaocheng Qi, and Yongbin Hu contributed equally to this work. 2
© Tsinghua University Press and Springer-Verlag GmbH Germany, part of Springer Nature 2020 Received: 29 June 2020 / Revised: 23 August 2020 / Accepted: 24 August 2020
ABSTRACT There is a continuous demand to reduce the size of the devices that form a unit circuit, such as logic gates and memory, to reduce their footprint and increase device integration. In order to achieve a highly efficient circuit architecture, optimizations need to be made in terms of device processing. However, the time involved in the current reduction of device sizes according to Moore's Law has slowed down. Here, we propose a flexible transistor with ultra-thin IGZO (InGaZnO, indium-gallium-zinc-oxide) as the channel material, which not only scales down the footprints of multi-transistor logic gates but also combines the functions of the logic gates, memory, and sensors into a single cell. The transistor proposed here has an ultrathin semiconductor layer and can implement the typical functions of logic gates that conventionally have 2–6 transistors. Furthermore, it demonstrates the memory effect with a programming time as low as 5 ns. This design can also display various artificial synaptic behaviors. This new device design and structure can be adopted for the development of next-generation flexible electronics that require higher integration.
KEYWORDS small footprint, flexible electronics, neuromorphic circuit, logic gates, memory, sensors
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Introduction
The increasing requirement for high-performance computing has been the driving force for the miniaturization of logic gates in integrated circuits (IC) for decades [1–5]. Moore’s Law states that when the price remains the same, the number of components that can be accommodated on an IC will double approximately every 18–24 months, and the performance will also double [6–9]. However, owing to the limitations of material thickness and device structure, the pace of reduction in device size described by Moore's Law is slowing down [10–13]. According to recent research, in order to break through the device fabrication bottleneck imposed by the molecular dimensions of the materials, new device designs or architectures are needed for continuous scaling down [14–18]. To develop ICs with higher circuit integration, we propose the u
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