Using LC-3 Soft Core on an FPGA Development Board for Microprocessor Labs
In this study, a Little Computer 3 (LC-3) core is ported to Altera’s Cyclone III FPGA on the DE0 development board. DE0 input/output devices such as seven-segment display, LED, switch, GPIO devices, and Lego Mindstorms NXT devices are added as memory-mapp
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Abstract In this study, a Little Computer 3 (LC-3) core is ported to Altera’s Cyclone III FPGA on the DE0 development board. DE0 input/output devices such as seven-segment display, LED, switch, GPIO devices, and Lego Mindstorms NXT devices are added as memory-mapped devices. The LC-3 core was designed with VHDL on Quartus II 9.0 Web Edition. The input/output devices on DE0 can be manipulated by LC-3 instructions. With these additional devices in LC-3, more diversified and interesting labs can be designed. Students can first test their programs on the simulator and then on DE0. This should add more fun to learning assembly language programming and computer organization and flatten the learning curve. Keywords LC-3 • FPGA • DE0 • NXT • Assembly language
1 Introduction It is not difficult for engineering students to learn computer programming in high-level languages such as C, Java, and VB. However, they might not know much about computer organization and architecture even if they do well in programming in high-level languages. For the students who want to understand how a computer really works in hardware level, they must learn assembly language
Y.-J. Liao (*) Graduate School of Electronic Engineering, National Yunlin University of Science & Technology, Douliou, Yunlin 64002, Taiwan e-mail: [email protected] W.-K. Wong Department of Electronic Engineering, National Yunlin University of Science & Technology, Douliou, Yunlin 64002, Taiwan J. Juang and Y.-C. Huang (eds.), Intelligent Technologies and Engineering Systems, Lecture Notes in Electrical Engineering 234, DOI 10.1007/978-1-4614-6747-2_71, # Springer Science+Business Media New York 2013
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programming. LC-3 is an Instruction Set Architecture (ISA) with an assembler and simulator suite that students may use in learning the organization of a microprocessor. This study is about the design of such a course, which makes use of a soft processor LC-3 that runs on an FPGA platform.
1.1
Introduction to LC-3
The Little Computer 3 (LC-3) is developed by Patt and Patel [1]. LC-3 instruction set implements 15 types of instructions and specifies a word size of 16 bits for its registers and uses a 16-bit addressable memory. The register file contains eight registers, referred to by number as R0 through R7. All of the registers are generalpurpose in that they may be freely used by any of the instructions. LC-3 is a 16-bit processor with a small instruction set that beginners can learn with a low hurdle. Students can develop an assembly program on an LC-3 Editor with an assembler and runs its object code on an LC-3 simulator [2].
1.2
Related Work
Google search shows that many universities use a 32-bit soft core NIOS II provided by Altera in their microprocessor lab courses (e.g., [3]). NIOS II is a good choice because it comes with an integrated development environment with an assembler and a C compiler that compiles C programs into NIOS instructions. In addition, there are several simulators that help the design of NIOS II ass
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