Visualisation of Ge Condensation in SOI
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0913-D01-09
Visualisation of Ge Condensation in SOI Kristel Fobelets1, Benjamin Vincent1, Munir Ahmad1, Astolfi Christofi2, and David McPhail2 1 Electrical and Electronic Engineering, Imperial College London, Exhibition Road, London, London, SW7 2BT, United Kingdom 2 Materials, Imperial College London, Exhibition Road, London, London, SW7 2BT, United Kingdom
ABSTRACT We use a novel technique CABOOM – Characterisation of Alloy concentration via Beveling, Oxidation and Optical Microscopy – to visualize the change of the Ge concentration sandwiched between two SiO2 layers during the Ge condensation process. CABOOM is very sensitive to variations in the gradient of the Ge concentration in the SiGe layer and thus gives a fast and simple way to interpret the condensation process. We present a systematic study of Ge condensation in a 120nm thick Si0.92Ge0.08 layer on a 60 nm Si body SOI (silicon-on-insulator) as a function of oxidation temperature and time, using CABOOM, SIMS and XRD. CABOOM shows the non-linear variation of the Ge diffusion as a function of process time. INTRODUCTION In the quest for fast and low power integrated circuits, silicon-on-insulator (SOI) substrates have shown speed and power performance improvements. The introduction of Si:SiGe heterojunctions have also led to device and circuit improvements beyond those possible in bulk Si. Research is now aimed at combining both technologies into SiGe-on-insulator (SGOI), strained-Si-on-insulator (sSOI) and Ge-on-insulator (GOI). The two main fabrication techniques are SIMOX [1] and SMARTCUT [2]. Both techniques are based on epitaxial growth of virtual substrates and relaxed SiGe buffer layers, making production time-consuming and expensive. They suffer both from limitations on maximum Ge concentration (±30%) due to dislocation formation and temperature restrictions. In [3] another fabrication method was proposed: direct epitaxial growth of low Ge contents SiGe on SOI followed by Ge condensation between two oxide layers. This led to higher Ge concentrations, beyond the as-grown value and even to pure GOI substrates [4]. Ge condensation is based on two competitive mechanisms during dry thermal oxidation of SiGe grown on SOI. On one hand the SiGe alloy is oxidized which causes a Ge accumulation at the interface between the alloy and the top oxide that is being formed. No GeO2 is produced at the interface because of the preferential formation of SiO2 at high temperatures [5]. On the other hand Ge can diffuse into the remaining SiGe/Si layers while diffusion into the substrate is blocked by the buried oxide (BOX) of the SOI wafer. These mechanisms depend on the oxidation temperature [6]. For temperatures below 1200°C the diffusion length of Ge in Si is smaller than the diffusion length of O2 in SiO2, thus oxidation is the dominant mechanism and Ge diffusion is minimal, this tends to accumulate Ge at the SiGe/SiO2 interface. For temperatures above 1200°C the Ge diffusion length in Si is larger than O2 in SiO2, thus Ge diffusion is enhanced and more homogeneous
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