Whole-Wafer Optical Mapping of Defects in Insulating Silicon Carbide Wafers

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K2.16.1

Whole-Wafer Optical Mapping of Defects in Insulating Silicon Carbide Wafers Millard G. Miera, John J. Boeckla, David A. Hillb, Scott D. Bertrandc, Easwar Ramakrishnanc, Matthew D. Rothd,e, Cengiz Balkasd,f, and Matthew P. Nelsong a Air Force Research Laboratory, Materials and Manufacturing Directorate, Wright-Patterson AFB OH b Wyle Laboratory, Dayton OH c OriginLab Inc., Northampton MA d Sterling Semiconductor Inc., Sterling VA e Now at the Applied Physics Laboratory of Pennsylvania State University, Kittanning PA f Now at Yenitech Inc., Reston VA g ChemIcon Inc., Pittsburgh PA

ABSTRACT Plotting defect locations in insulating SiC presents a challenge because the total number of locations on a wafer is so large. We scan the wafer with visible light at an appropriate resolution and sort out transmissions appropriate for the defects we are looking for. Under these conditions, we find that voids and micropipes reduce the pixel transmission to 0.3 to 0.5. Sorting for this transmission reduces the number of pixels of interest to a manageable number, especially with recent progress in growing lower defect SiC. Now a commercial plotting program can easily display defect locations within a circle representing the wafer boundary. We verify the defect locations by scanning electron microscope secondary electron images and scanning optical microscope visible-light images at several resolutions. INTRODUCTION Silicon carbide (SiC) is a promising new electronic material for extreme environment applications. It is very stable thermally, chemically, and electronically[1]. Though low carrier mobility limits its high-frequency microwave applications to X-band[2], SiC has reasonably large thermal conductivity[3] which makes it appealing as a substrate for higher-frequency applications. High-resistivity or semi-insulating SiC is especially attractive as a microwave device substrate[4]. The extreme stability of SiC makes it very difficult to grow. The only growth process that has been found viable for commercial growth is physical vapor deposition (PVD)[5], which is thermal sublimation and condensation. Besides incorporation of unwanted impurities, PVD is prone to incorporation of crystalline imperfections[6]. SiC grows stoichiometrically in a number of polytypes[7] and crystal growers are to be commended that single-polytype SiC is available. Even in very pure single-polytype SiC, crystalline imperfections persist. Perhaps the most troublesome such imperfection is the micropipe[8], a hollow screw dislocation that can propagate lengthwise through an entire boule of otherwise-perfect SiC. Micropipes seem to start when an impurity deposits on the growing crystal and it propagates along the growth axis[6]. When a SiC boule is sawn into wafers, micropipes appear as hexagonal holes in the wafer. When epitaxial active layers are grown for devices, a micropipe can extend into active layers with disasterous effects on device properties[5].

K2.16.2

Again, crystal growers are to be commended that recent SiC wafers have very few micro