Demonstration of Hybrid Silicon-on-Silicon Carbide Wafers and Electrical Test Structures with Improved Thermal Performan

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0911-B10-13

Demonstration of Hybrid Silicon-on-Silicon Carbide Wafers and Electrical Test Structures with Improved Thermal Performance Steven G. Whipple1, John T. Torvik2, Randolph E. Treece3, and Jeffrey T. Bernacki3 1 Physics, University of Colorado, Campus Box 390, Boulder, CO, 80309 2 Electrical Engineering, University of Colorado, Campus Box 425, Boulder, CO, 80309 3 Astralux, Inc., 2500 Central Avenue, Boulder, CO, 80301 ABSTRACT Multiple 50 mm hybrid Si-on-SiC substrates consisting of thin film [100] Si (1 µm) on bulk semi-insulating [0001] 6H-SiC wafers were fabricated using low-temperature (150 ˚C) wafer bonding and slicing techniques. A set of samples were prepared comparing various thicknesses of SiO2 (60, 120, 190, 240 and 520 nm) as an intermediate bonding layer between the two materials. A variety of test structures such as Van der Pauw structures, linear transferlength measurement arrays and resistors were fabricated in the Si layers using standard Si processing (such as lithography, B-diffusion, etching and oxidation) in order to characterize the robustness as well as the electrical and thermal properties of the hybrid substrates. Bulk Si and Si-on-insulator (SOI) substrates were used for comparison. We report the Si layers on the hybrid Si-on-SiC substrates to be device-grade in terms of mobility and crystal structure, and that their device-to-device electrical isolation properties are superior to those of bulk Si and comparable to those of SOI. Furthermore, electrical test structures on hybrid Si-on-SiC substrates exhibit vastly superior heat dissipation compared to equivalent devices on bulk Si or SOI. Specifically, the temperature rise can be as much as 102 ˚C lower in resistor devices made on Si-on-SiC (Tj= 191 ˚C) compared to on bulk Si (Tj= 293 ˚C) under high-power density operation (67 kW/cm2). We also describe the effects of intermediate oxide thickness on thermal resistance. INTRODUCTION SiC is a wide bandgap semiconductor with excellent material properties such as high breakdown field, saturation velocity, and adequate electron mobility as well as up to three times higher thermal conductivity compared to Si. It is expected that SiC devices may replace Si devices for certain high power and high frequency electronic application when SiC materials technology matures [1]. Currently SiC Schottky diodes and RF MESFETs are commercially available [2,3]. Possible applications for hybrid Si-on-SiC substrates include the integration of Si drive circuitry with SiC power devices and Si RF devices. For example high-power Si LDMOS RF transistors have severe thermal management issues when used in demanding cellular base station applications where near-CW operating conditions with high peak powers are required while still maintaining good linearity [4]. Aggressive substrate thinning and the use of isotopically purified Si have been explored to improve thermal management of such devices, but such schemes are still fundamentally limited in their potential for heat dissipation by silicon's relatively low the

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