A high performance integrated readout circuit for wavefront sensors
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A high performance integrated readout circuit for wavefront sensors Pablo N. Agra Belmonte1 · Ursula V. Abecassis1,3 · Lucas Chaves2 · Luciana P. Salles1,2 · Davies W. de Lima Monteiro1,2 Received: 10 December 2019 / Accepted: 29 September 2020 © Springer Nature Switzerland AG 2020
Abstract This work presents an integrated pixel topology that promises to offer superior performance in a Hartmann–Shack Wavefront Sensor (WFS) with an orthogonal array of Quad Cells serving as Position-Sensitive Detectors. The readout integrated circuit for each photodiode is fully compliant to any standard CMOS microelectronics technology and is advantageously tolerant to high background illumination levels whereas maintaining both high linearity and high sensitivity. To assess the operation of this pixel on the focal-plane array of the WFS, we developed a computational platform encompassing a full detection chain comprising wavefront sampling, photodetection, electronic circuitry and wavefront reconstruction. It couples an algorithm written in C to SPICE (Simulated Program with Integrated Circuits Emphasis). The platform is technology agnostic and flexible, enabling easy modification to represent different detection or reconstruction methods. The results obtained with the proposed pixel have been compared to those obtained with a conventional pixel in CMOS image sensor. Keywords Wavefront sensor · Pixel · Microelectronics · Integrated circuit · Quadrant detector · Wavefront sensing · Hartmann–Shack
1 Introduction Wavefront Sensors (WFS) are consolidated and ubiquitous in Adaptive Optical (AO) systems. Among all types of WFS, the Hartmann–Shack (HS) method is one of the most employed, being versatile and rather simple [1, 2]. It features robustness to vibrations; compact assembly; relative low cost; flexible adaptation to different magnitudes of aberrations; and fast WF reconstruction [3]. There have been several adaptive optical system open-access simulation tools implemented, mostly targeting astronomy, but with a potential for adaptation to other fields [4–12]. Although developed to different degrees of completeness and universality, they do not yet offer the possibility to couple electronic-circuit simulations, on circuit and device
level, along with optical and data-processing algorithms. In this work, we evaluate the impact of a promising integrated-circuit pixel topology at the focal-plane array of a HS WFS by means of a computational platform we developed for the seamless simulation of the optical and electronic signal flow, whose details are presented in previous works [13, 14]. The platform includes the modelling of the input beam and aberration; the microlens array; the Position-Sensitive Detectors (PSDs); the readout integrated circuits (ROICs); and a modal WF reconstruction algorithm. It conveniently enables the evaluation of different topologies and circuits prior to the fabrication of the device. The main focus of the paper is to assess the performance of a superior integrated pixel topology at the focal plane of th
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