Three-Dimensional Integrated Circuit Technology

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THREE-DIMENSIONAL

INTEGRATED CIRCUIT TECHNOLOGY

DIMITRI A. ANTONIADIS Massachusetts Institute of Technology,

Cambridge,

MA 02139

ABSTRACT Within the last five years considerable research has focused on techniques to create "device-worthy" crystalline Though several applications silicon films on insulators. for such techniques have been proposed, none is more exciting than the prospect of "3-D Integration", which has come to mean any IC technology that would yield more than one This paper reviews the progress to plane of active devices. examining the merits and date in this field by critically dismerits of the several silicon film preparation techniques, the several proposed 3-D device structures, and some possible applications of 3-D integration in electronic systems.

INTRODUCTION Any integrated circuit (IC) technology that can implement more than a single plane of active devices has come to be called a 3-D IC technology. Since this term implies nearly equal structural complexity in all three dimensions, I introduce here the term multilayer device (MLD) technology, It is as a less restrictive term to denote this class of technologies. clear that MLD's require at least one level of semiconductor-on-insulator (SOI). Indeed, it has been the relatively recent breakthroughs in SO0 techniques that have provided the present stimulus for MLD development. In general, SOI stands for any large grain or single crystal semiconHowever, due to the preponderance ductor film on an amorphous insulator. SOI is the of work with silicon, the S in SOI usually stands for silicon. key requirement for MLD implementation and thus the currently available SOI However, preparation techniques will be reviewed in the MLD context. before proceeding into the technical aspects of this paper, it is interesting to consider what are the motivating factors behind present forms of MLD technologies and even further, truly 3-D, IC technologies. In my view, there are two motivating factors: (a) Area reduction in integrated systems with attendant increase in functionality and speed. This is the result of the continuous drive toward increased functionality of integrated systems and of the perception of oncoming bottlenecks in this (b) The potential for drive when pursued with conventional technologies. combination of different semiconductor materials on the same substrate that can open new integrated system opportunities such as electronic signal processing coupled with optical signal transmission. Although some progress has been made recently toward combining different semiconductor materials, the preponderance of research effort to date has been driven by the first of the two above motivating factors. Thus, for the remainder of this paper I will examine MLD technologies from only this standpoint.

Mat.

Res.

Soc. Symp.

Proc. Vol. 23 (1984)

Published by Elsevier Science Publishing Co.,

Inc.

588

REVIEW OF PROPOSED MLD TECHNOLOGIES Following is a brief review of the MLD technologies that have been demonstrated to date. a)

Joint Gate CMOS (JCMOS)