Metallization for Integrated Circuit Manufacturing
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Rajiv V. Joshi, Guest Editor for this issue of the MRS Bulletin, received his BTech degree from the Indian Institute of Technology (Bombay), his MS degree from the Massachusetts Institute of Technology, and his PhD degree from Columbia University.
The semiconductor industry has relied on aluminum technology since the 1960s because it is a well-established, low-cost technology. Early improvements in the electromigration resistance of Al lines by the addition of Cu impurities after 1971 helped this metallurgy to endure further feature size reductions, without degradation of reliability. However, the relentless reduction in via and line size once again may bring into question the limitation of Al reliability. As a result, work on alternate low-resistivity and high-electromigration-resistant metals like Cu is continuing in parallel. For the current generation of devices, the nearly universal choice for interconnects is Al-based metallurgy embedded in an oxide/nitride dielectric with refractory metal plugs. More specifically for interconnects and via applications, Al-alloy reflow and chemically vapordeposited (CVD) tungsten, respectively, with various liners (Ti/W or Ti/TiN) are the standards of the industry. In this issue, the work of scientists across the globe is presented to describe the status of Al-alloy metal interconnections with or without W, Al via plugs, diffusion barriers, and contact metallurgy. Diffusion
He joined IBM in 1983 and since then has been working in systems, science, and technology. He has won 10 invention plateau achievement awards from IBM. The author and co-author of over 65 research papers, Joshi has presented several invited talks. He
MRS BULLETIN/NOVEMBER 1995
holds 20 U.S. patents, with several still pending. His research in damascene of hard and soft layers, PVD liners, diffusion barriers, and Ti/TiN/CVD W has been internationally recognized. His research interests are in thin-film processing, develop-
barriers for Al reflow, or CVD W for filling contacts or vias, are described. The liners can be deposited either by CVD or physical vapor deposition (PVD). Although PVD has been a popular choice, CVD may play a crucial role for liners when coverage becomes a challenge for sub-0.30-/j,m vias. This is followed by a discussion of CVD W (blanket, selective) and Al reflow for via filling applications. Novel reduction reactions are described for depositing CVD W, but the choice of SiH4 reduction followed by H2 reduction for depositing W is the most widespread practice. For aluminum deposition, new processes on the horizon are reviewed such as sputtered Al-Ge, high-pressure reflow, and long-throw Al deposition. Chemical-mechanical polishing (CMP) has emerged as the most popular approach to global planarization. Although CMP is an established technology for harder metals like W and for dielectrics, its application to softer Al-alloys and copper remains in the preproduction stage. However, several feasibility studies and new slurries for aluminum planarization have been introduced. Electromigr
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