A Low-Power High-Gain Low-Dropout Regulator for Implantable Biomedical Applications
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A Low‑Power High‑Gain Low‑Dropout Regulator for Implantable Biomedical Applications Mehdi Moradian Boanloo1 · Mohammad Yavari1 Received: 18 September 2019 / Revised: 6 August 2020 / Accepted: 11 August 2020 © Springer Science+Business Media, LLC, part of Springer Nature 2020
Abstract This paper presents an ultra-low-power and high-gain low-dropout (LDO) regulator. It is based on the flipped voltage follower cell with an adaptive biasing technique that is suitable for implantable biomedical applications. The error amplifier for the proposed regulator consists of two cross-coupled common-gate cells and a pseudofolded-cascode structure to increase the regulator’s loop gain. In addition, three different compensation techniques including Miller, cascode, and Q-reduction are simultaneously utilized at the LDO regulator to achieve high stability despite having the minimum load current and ultra-low power consumption. The proposed LDO regulator has been simulated in TSMC 90-nm CMOS technology with minimum power consumption of 2.8 µW at no load. Post-layout simulation results show that the proposed LDO regulator is stable over load currents from 30 µA to 40 mA with a maximum on-chip CL of 100 pF. Moreover, the voltage regulator settles in less than 850 ns at 0.75 V output voltage that is achieved in response to a load transient step of 40 mA with a rise time of 200 ns. Besides, the obtained line and load regulations are significantly improved to 1 mV/V and 36 µV/mA, respectively. Keywords Low-dropout (LDO) regulator · Adaptive biasing · Pseudo-foldedcascode structure · Transient response · Power consumption · Implantable biomedical devices
* Mohammad Yavari [email protected] Mehdi Moradian Boanloo [email protected] 1
Integrated Circuits Design Laboratory, Department of Electrical Engineering, Amirkabir University of Technology (Tehran Polytechnic), 424 Hafez Ave, Tehran 15914, Iran Vol.:(0123456789)
Circuits, Systems, and Signal Processing
1 Introduction Low-dropout (LDO) regulators are one of the important parts of power management systems in radio frequency identification tags and implantable biomedical devices [22, 25, 26], where the supplied energy to these systems should be severely restricted. In addition, the active silicon area of the LDO regulators comprising the transistors and compensation capacitors must be as small as possible. In implantable biomedical applications, voltage regulators should consume ultralow quiescent current to have longer LDO regulator battery lifetime, low dropout voltage, small chip area, high power supply rejection (PSR), and stable operation at low load currents [18, 19, 24]. Moreover, fast line and load transient responses at the output of the voltage regulator are also extremely important. As yet, several LDO regulators have been reported in [4, 9, 10, 13, 14, 20, 16, 17]. In [9], the regulator combines the single-stage load regulation with replica biasing. It achieves optimum load regulation and a very fast time response with a high quiescent current of 6 mA, which is
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